4b2464fc90
All x86 chipsets and SoCs have the HPET MMIO base address at 0xfed00000, so define this once in arch/x86 and include this wherever needed. The old AMD AGESA code in vendorcode that has its own definition is left unchanged, but sb/amd/cimx/sb800/cfg.c is changed to use the new common definition. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifc624051cc6c0f125fa154e826cfbeaf41b4de83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> |
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.. | ||
acpi | ||
bootblock | ||
include/soc | ||
romstage | ||
acpi.c | ||
chip.c | ||
chip.h | ||
cpu.c | ||
dptf.c | ||
elog.c | ||
espi.c | ||
finalize.c | ||
fsp_params.c | ||
gpio.c | ||
gspi.c | ||
i2c.c | ||
Kconfig | ||
lockdown.c | ||
Makefile.inc | ||
me.c | ||
meminit.c | ||
p2sb.c | ||
pmc.c | ||
pmutil.c | ||
reset.c | ||
sd.c | ||
smihandler.c | ||
spi.c | ||
systemagent.c | ||
uart.c | ||
xhci.c |