coreboot-kgpe-d16/src
Lee Leahy 94b856ef9a FSP 1.1: Move common FSP code
Move the FSP common code from the src/soc/intel/common directory into
the src/drivers/intel/fsp1_1 directory.  Rename the Kconfig values
associated with this common code.

BRANCH=none
BUG=None
TEST=Build and run on kunimitsu

Change-Id: If1ca613b5010424c797e047c2258760ac3724a5a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e8228cb2a12df1cc06646071fafe10e50bf01440
Original-Change-Id: I4ea84ea4e3e96ae0cfdbbaeb1316caee83359293
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/306350
Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12156
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
2015-10-27 15:19:03 +01:00
..
acpi acpi/sata: add generic sata ssdt port generator 2015-06-07 01:24:47 +02:00
arch armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write 2015-10-17 18:10:29 +00:00
commonlib vboot: prepare for x86 verstage 2015-10-11 23:57:29 +00:00
console x86: add standalone verstage support 2015-10-14 17:07:52 +00:00
cpu cpu/amd/car: Add initial Suspend to RAM (S3) support 2015-10-27 15:12:08 +01:00
device yabel: explicitly cast values to match printk expectations 2015-10-25 07:29:55 +01:00
drivers FSP 1.1: Move common FSP code 2015-10-27 15:19:03 +01:00
ec ec/chrome: Disable LPC Continuous Serial IRQ Select 2015-10-27 15:18:50 +01:00
include coreboot: make lb_framebuffer a weak function 2015-10-27 15:15:09 +01:00
lib boot_device: add call to boot_device_init() 2015-10-27 15:18:33 +01:00
mainboard google/chell: Add new mainboard for chell 2015-10-27 15:17:17 +01:00
northbridge northbridge/amd/amdfam10: Limit maximum RAM clock to BKDG recommendations 2015-10-27 05:31:57 +01:00
soc FSP 1.1: Move common FSP code 2015-10-27 15:19:03 +01:00
southbridge southbridge/amd/sr5650: Add AMD Family 15h CPU support 2015-10-26 07:32:58 +01:00
superio superio/nuvoton/nct5572d: Enable power state after power failure support 2015-10-23 20:04:07 +02:00
vendorcode amd/sb800: Make UsbRxMode per-board customizable 2015-10-24 00:21:01 +02:00
Kconfig Separate bootsplash image menuconfig option from others 2015-10-25 07:28:38 +01:00