Meera Ravindranath 98e827ea74 mb/intel/adlrvp: Enable CPU PCIe RP 2 ... Disabling CPU PCIe RP 2 (commit:3fd39467b Fix S0ix regression) causes regression in NVMe boot on ADL-P RVP boards. Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Change-Id: I0b8b76a5537d8b80777cb7588ce6b22281af7882 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59392 Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-11-19 06:21:21 +00:00
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include/baseboard	mb/intel/adlrvp: Configure EC in RW GPIO	2021-11-02 08:22:10 +00:00
spd	mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU	2021-08-13 18:04:02 +00:00
variants	mb/intel/adlrvp_p: Enable TCSS USB ports device path	2021-09-14 14:04:30 +00:00
board_id.c
board_id.h
board_info.txt
bootblock.c	mb/{google, intel}: Make use of `cpu/intel/cpu_ids.h'	2021-07-19 18:25:42 +00:00
chromeos.c	Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main"	2021-11-15 12:00:12 +00:00
chromeos.fmd	mb/intel/adlrvp: Set same size for CSE_RW and ME_RW_A/B	2021-11-09 19:19:51 +00:00
devicetree.cb	mb/intel/adlrvp: Enable CPU PCIe RP 2	2021-11-19 06:21:21 +00:00
devicetree_m.cb	mb/intel/adlrvp_m: Enable touchpad	2021-10-20 15:48:22 +00:00
dsdt.asl	mb/intel/adlrvp: Remove ASL code and enable dynamic SSDT creation for camera ACPI	2021-07-05 10:51:32 +00:00
early_gpio.c	mb/intel/adlrvp: Configure EC in RW GPIO	2021-11-02 08:22:10 +00:00
early_gpio_m.c	mb/intel/adlrvp: Configure EC in RW GPIO	2021-11-02 08:22:10 +00:00
ec.c
fw_config.c	mb/intel/adlrvp: Enable I2S audio codecs on ADL-M RVP	2021-07-21 15:43:16 +00:00
gpio.c	ChromeOS: Replace with or add <types.h>	2021-11-11 06:25:12 +00:00
gpio_m.c	mb/intel/adlrvp_m: Enable touchpad	2021-10-20 15:48:22 +00:00
Kconfig	mb/intel/adlrvp: Rework Kconfig	2021-10-20 19:42:22 +00:00
Kconfig.name	mb/intel/adlrvp: Rework Kconfig	2021-10-20 19:42:22 +00:00
mainboard.c	mb/intel/adlrvp: create dynamic power limits mechanism for thermal	2021-08-10 21:22:22 +00:00
Makefile.inc	mb/intel/adlrvp: create dynamic power limits mechanism for thermal	2021-08-10 21:22:22 +00:00
memory.c	mb/intel/adlrvp: Fix sagv point3 clipping to 4800Mhz	2021-11-17 00:35:59 +00:00
ramstage.c	mb/google,intel: Fix indirect include bootmode.h	2021-11-05 15:39:54 +00:00
romstage_fsp_params.c	mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU	2021-08-13 18:04:02 +00:00
smihandler.c