coreboot-kgpe-d16/src/southbridge/intel/bd82x6x
Stefan Reinauer 998f3a27be Cougar/Panther Point: Compile in ME7 and ME8 code at the same time
In the short term there might be devices with Sandy Bridge CPUs
on mainboards with Panther Point PCHes. While this configuration
option is perfectly valid, coreboot currently ties Sandy Bridge to
Cougar Point and Ivy Bridge to Panther Point. One occurence is in
the ME handling code.

To make coreboot most flexible, compile both ME handlers into
coreboot and decide at runtime which one to use.

Change-Id: Icffe2930873f67c99c3f73e37e7a967f4f002b88
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1280
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-24 23:17:17 +02:00
..
acpi Update PCIe Root Port _PRT to handle re-mapped functions 2012-05-01 21:21:19 +02:00
azalia.c bd82x6x: Convert all PCI ID lists to new scheme 2012-07-24 12:26:33 +02:00
bootblock.c RTC: Enable extended CMOS in the bootblock 2012-07-24 15:00:54 +02:00
chip.h Add an option to enable PCIe root port coalescing 2012-05-01 21:21:45 +02:00
early_me.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
early_smbus.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
early_usb.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
finalize.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
gpio.c Fix function generating GPIO state based vector 2012-07-24 19:53:28 +02:00
gpio.h Provide functions to access arbitrary GPIO pins and vectors 2012-05-30 00:53:19 +02:00
Kconfig Add SPI flash driver 2012-05-10 23:52:44 +02:00
lpc.c Add specific power management init code for PantherPoint 2012-07-24 19:06:17 +02:00
Makefile.inc Cougar/Panther Point: Compile in ME7 and ME8 code at the same time 2012-07-24 23:17:17 +02:00
me.c Cougar/Panther Point: Compile in ME7 and ME8 code at the same time 2012-07-24 23:17:17 +02:00
me.h Cougar/Panther Point: Compile in ME7 and ME8 code at the same time 2012-07-24 23:17:17 +02:00
me_8.x.c Cougar/Panther Point: Compile in ME7 and ME8 code at the same time 2012-07-24 23:17:17 +02:00
me_status.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
nvs.h Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
pch.c Add PCIe port disable debug message 2012-07-24 21:40:44 +02:00
pch.h Add an option to enable PCIe root port coalescing 2012-05-01 21:21:45 +02:00
pci.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
pcie.c bd82x6x: Convert all PCI ID lists to new scheme 2012-07-24 12:26:33 +02:00
reset.c Fix full reset for Ivy Bridge platforms 2012-05-29 11:29:24 +02:00
sata.c bd82x6x: Convert all PCI ID lists to new scheme 2012-07-24 12:26:33 +02:00
smbus.c bd82x6x: Convert all PCI ID lists to new scheme 2012-07-24 12:26:33 +02:00
smbus.h Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
smi.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
smihandler.c bd82x6x: Support power-on-after-power-fail better 2012-07-24 20:09:46 +02:00
spi.c SPI flash layer: remove unused function spi_flash_free() 2012-07-24 02:37:39 +02:00
usb_debug.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00
usb_ehci.c bd82x6x: Convert all PCI ID lists to new scheme 2012-07-24 12:26:33 +02:00
watchdog.c Add support for Intel Panther Point PCH 2012-04-04 19:10:51 +02:00