coreboot-kgpe-d16/src/soc/imgtec/pistachio
Ionela Voinescu 4f3d400a30 imgtec/pistachio: disable default RPU gate register values
The RPU Clock register defaults to on for all clocks.
This is modified to OFF, and the MIPS clock control modified to ON,
by default. This is because the linux kernel will manage the
clocks at all times, but the RPU can only disable clocks if the WIFI
module has been loaded.

Change-Id: I155fb37afd585ca3436a77b97c99ca6e582cbb4f
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Reviewed-on: https://review.coreboot.org/12773
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-31 17:36:06 +01:00
..
include/soc imgtec/pistachio: disable default RPU gate register values 2015-12-31 17:36:06 +01:00
bootblock.c imgtec/pistachio: identity map SOC registers region 2015-12-31 17:34:28 +01:00
cbmem.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
clocks.c imgtec/pistachio: disable default RPU gate register values 2015-12-31 17:36:06 +01:00
ddr2_init.c imgtec/pistachio: DDR2, DDR3: DLL reset set 2015-12-21 02:06:12 +01:00
ddr3_init.c imgtec/pistachio: DDR2, DDR3: DLL reset set 2015-12-21 02:06:12 +01:00
Kconfig Drop src/cpu/ indirection for MIPS 2015-12-17 21:25:31 +01:00
Makefile.inc soc/imgtec/pistachio: Implement hard_reset() 2015-12-17 21:13:35 +01:00
monotonic_timer.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
reset.c soc/imgtec/pistachio: add implementation for system reset 2015-12-17 21:13:57 +01:00
romstage.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
soc.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
spi.c pistachio: sort included header files 2015-06-10 22:21:55 +02:00
uart.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00