coreboot-kgpe-d16/src/soc/intel/common
Furquan Shaikh a8198eb9ad soc/intel/common/uart: Add support for enabling UART debug controller on resume
It has been observed on a number of platforms (baytrail, kaby lake)
that if serial console is not enabled in coreboot, but is enabled in
kernel (v4.4), then on resume kernel hangs. In order to fix this, add
support for enabling UART debug port controller on resume.

In order to decide whether UART debug port controller should be
enabled in ramstage, following things are checked in given order:
1. If coreboot has serial console enabled, there is no need to
re-initialize the controller.

2. This special action is taken only for UART debug port controller.

3. If boot is not S3 resume, then initialization is skipped.

4. Callback into SoC to check if it wants to initialize the
controller.

If all the above conditions are met, then UART debug port controller
is initialized and taken out of reset.

BUG=b:64030366
TEST=Verified with the entire patchset series that:
1. If coreboot does not have serial console enabled, but Linux kernel
has console enabled, then on resume, coreboot initializes UART debug
port controller.

2. If coreboot and Linux do not have serial console enabled, then
coreboot does not initialize UART debug port controller.

3. If coreboot has serial console enabled, there is no change in
behavior.

Change-Id: Ic936ac2a787fdc83935103c3ce4ed8f124a97a89
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/20835
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-10 16:25:05 +00:00
..
acpi soc/intel: Remove ACPI notification for fan speed change 2017-08-08 18:19:04 +00:00
block soc/intel/common/uart: Add support for enabling UART debug controller on resume 2017-08-10 16:25:05 +00:00
acpi.h src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
acpi_wake_source.c
hda_verb.c soc/intel/common: Fix spacing issues 2017-03-13 17:08:34 +01:00
hda_verb.h
Kconfig mma: Make MMA blobs path SOC specific 2017-04-26 16:26:46 +02:00
Makefile.inc soc/intel/common: Add SMM common code for Intel Platforms 2017-06-20 18:30:43 +02:00
mma.c Rename __attribute__((packed)) --> __packed 2017-07-13 19:45:59 +00:00
mma.h intel MMA: Enable MMA with FSP2.0 2016-12-13 18:00:43 +01:00
mrc_cache.c Rename __attribute__((packed)) --> __packed 2017-07-13 19:45:59 +00:00
mrc_cache.h soc/intel/common: remove mrc cache assumptions 2016-12-15 07:51:35 +01:00
nhlt.c lib/nhlt: add support for setting the oem_revision 2016-12-01 08:17:42 +01:00
nvm.c soc/intel/common: remove mrc cache assumptions 2016-12-15 07:51:35 +01:00
nvm.h soc/intel/common: remove mrc cache assumptions 2016-12-15 07:51:35 +01:00
opregion.c soc/intel/common/opregion: Use enum cb_err as return value 2017-06-27 17:18:03 +00:00
opregion.h soc/intel/common/opregion: Use enum cb_err as return value 2017-06-27 17:18:03 +00:00
reset.c Consolidate reset API, add generic reset_prepare mechanism 2017-06-13 20:53:09 +02:00
smbios.c soc/intel/common/smbios: Amend debug message 2017-07-20 15:23:11 +00:00
smbios.h soc/intel/common: Pass the minimum possible string length for strncpy 2017-03-10 19:59:58 +01:00
spi_flash.c soc/intel: Use correct terminology for SPI flash operations 2016-11-22 17:39:07 +01:00
spi_flash.h soc/intel: Use correct terminology for SPI flash operations 2016-11-22 17:39:07 +01:00
tpm_tis.c soc/intel/common: provide default tis_plat_irq_status() implementation 2017-04-24 22:03:13 +02:00
util.c CPU: Declare cpu_phys_address_size() for all arch 2016-12-06 20:53:45 +01:00
util.h cpu/x86: Support CPUs without rdmsr/wrmsr instructions 2016-07-27 13:50:11 +02:00
vbt.c fsp/gop: Add running the GOP to the choice of gfx init 2017-06-08 14:58:29 +02:00
vbt.h soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume 2016-07-29 00:09:05 +02:00