coreboot-kgpe-d16/src
Subrata Banik a971254d67 soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code
Solution: To do an additional config read to the SD controller
after the controller has been power gated (put to D3)

Change-Id: Ia2438c767332b0e2d413c71b06b052bf9ab4a96c
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/23313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-01-24 13:26:40 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch cpu/intel/speedstep: Fix the PNOT ACPI method 2018-01-17 17:09:13 +00:00
commonlib commonlib/region: expose subregion helper function 2017-12-15 23:35:05 +00:00
console
cpu AGESA f15 cimx/sb700: Remove unused chips code 2018-01-24 02:09:18 +00:00
device device/i2c_bus: allow i2c_bus and i2c_simple to coexist 2018-01-24 05:02:50 +00:00
drivers drives/i2c/designware: incorporate device_operations support 2018-01-24 05:03:10 +00:00
ec google/chromeec: Enable unified host event programming interface 2018-01-17 17:10:32 +00:00
include device/i2c_bus: allow i2c_bus and i2c_simple to coexist 2018-01-24 05:02:50 +00:00
lib security/tpm: Move tpm TSS and TSPI layer to security section 2018-01-18 01:35:31 +00:00
mainboard amd/torpedo cimx/sb900: Fix include directory 2018-01-24 02:08:51 +00:00
northbridge AGESA f15 cimx/sb700: Remove unused chips code 2018-01-24 02:09:18 +00:00
security security/tpm: Move TSS stacks into sub-directory 2018-01-18 02:17:34 +00:00
soc soc/intel/cannonlake: Port SD Controller W/A from Intel Reference code 2018-01-24 13:26:40 +00:00
southbridge AGESA f15 cimx/sb700: Remove unused chips code 2018-01-24 02:09:18 +00:00
superio Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT 2018-01-15 23:25:12 +00:00
vendorcode AGESA f15 cimx/sb700: Remove vendorcode source 2018-01-24 02:11:04 +00:00
Kconfig util/blobtool: rename to bincfg 2018-01-18 13:47:20 +00:00