John Zhao f3a8bf13cb soc/intel/alderlake: Drop 100ms delay and do not poll Link Active ... Drop the 100ms delay in the _PS0 method because kernel already adds this 100ms. This change also drops polling TBT PCIe root ports Link Active State because this scheme is not applicable for SW CM. BUG=None TEST=Built Alderlake coreboot image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I792d3c8ca4249ed74d4090ec1efba5a180429c75 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51191 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-15 06:30:52 +00:00
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amd	soc/amd/cezanne: Add i2c controllers to chipset.cb	2021-03-15 01:15:13 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
intel	soc/intel/alderlake: Drop 100ms delay and do not poll Link Active	2021-03-15 06:30:52 +00:00
mediatek	soc/mediatek/mt8192: devapc: Add domain remap setting	2021-03-15 02:28:32 +00:00
nvidia	src: Remove useless comments in "includes" lines	2021-02-04 10:18:49 +00:00
qualcomm	sc7180: make symbols common accross multiple targets.	2021-03-15 06:23:06 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	2021-03-08 22:31:29 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/header.c: Add missing include	2021-02-03 08:55:15 +00:00
ucb