Tim Wawrzynczak cf39336ccf soc/intel/alderlake: Add minimal ACPI support for PEG ports ... Add minimal Device entries with just an _ADR for each of the PEG ports for P and M chipsets (N does not have any PEG ports). Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Id1009004969729eddf7005fa190f5e1ca2d7b468 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60181 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>		2022-01-06 16:49:51 +00:00
..
alderlake	soc/intel/alderlake: Add minimal ACPI support for PEG ports	2022-01-06 16:49:51 +00:00
apollolake	soc/intel/apollolake/acpi: Replace Decrement() with ASL 2.0 syntax	2022-01-01 14:22:39 +00:00
baytrail	src: Use 'stdint.h' when appropriate	2022-01-01 14:58:44 +00:00
braswell	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
broadwell	sb/intel: Use bool for PCIe coalescing option	2022-01-04 11:48:19 +00:00
cannonlake	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
common	soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function	2022-01-06 16:48:09 +00:00
denverton_ns	soc/intel/denverton_ns: Use popcnt() helper	2021-12-17 21:41:39 +00:00
elkhartlake	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
icelake	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
jasperlake	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
quark	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
skylake	soc/intel/skylake/acpi: Replace Add(a,b) with ASL 2.0 syntax	2021-12-31 09:00:25 +00:00
tigerlake	soc/intel/tigerlake: Add soc_get_cpu_rp_vw_idx() function	2022-01-06 16:48:09 +00:00
xeon_sp	commonlib/cbmem_id.h: Fix typo in macro name	2021-11-25 11:13:28 +00:00
Kconfig
Makefile.inc	soc/intel/common/cse: Add support for stitching CSE components	2021-10-19 16:09:08 +00:00