Felix Singer c541567834 soc/qualcomm/{sc7180,sc7280}: Allow building without QC blobs repo ... Building coreboot for the Qualcomm SoCs SC7180 and SC7280 requires to include the Qualcomm blobs, which requires to accept their license. However, for various reasons it makes sense to build without blobs, e.g. static analysis or just build-testing. So in order to do that, run the steps integrating the Qualcomm blobs into the coreboot binary only if USE_QC_BLOBS is enabled and also remove guards which prevent building related mainboards when USE_QC_BLOBS is not enabled. Change-Id: I249ac477b8f10e7fa0848e967c23a3b3b9bbd27d Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79026 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2023-11-17 22:17:31 +00:00
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amd	soc/amd/genoa: Add mmio.asl	2023-11-15 13:52:13 +00:00
cavium	Revert "Kconfig: Bring HEAP_SIZE to a common, large value"	2023-11-07 17:35:39 +00:00
example/min86	soc: Remove SOC_SPECIFIC_OPTIONS	2023-08-21 23:45:43 +00:00
intel	soc/intel/cannonlake: Drop entries from soc_acpi_name()	2023-11-14 22:38:29 +00:00
mediatek	device/device.h: Rename pci_domain_scan_bus	2023-10-20 14:24:57 +00:00
nvidia	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
qualcomm	soc/qualcomm/{sc7180,sc7280}: Allow building without QC blobs repo	2023-11-17 22:17:31 +00:00
rockchip	fmap: Map less space in fallback path without CBFS verification	2023-11-13 14:19:01 +00:00
samsung	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
sifive/fu540	memlayout.ld: Increase RAMSTAGE size to more than 1MB everywhere	2023-10-11 12:08:22 +00:00
ti
ucb/riscv