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coreboot-kgpe-d16/src/soc/nvidia/tegra132
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Tom Warren bfbfcf719c Ryu: Move I2C6 init to ramstage 
BUG=chrome-os-partner:31820
BRANCH=none
TEST=Dumped Speaker Driver (AD SSM4567) regs on Ryu, looks good.

Change-Id: I9b094e9d22726d67d41f2ce78088f361c73895fd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4c0bfb5f747f55009b7c2b2ba4b24d91443b1639
Original-Change-Id: Idd5b95cfec7d3ade7508393b81ab3049ce15a2fb
Original-Signed-off-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/218950
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9095
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-28 07:05:39 +01:00
..
include/soc tegra132: use generic GIC driver 2015-03-28 07:05:06 +01:00
32bit_reset.S tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
addressmap.c tegra132: remove printk() before console_init() 2015-03-27 08:04:44 +01:00
bootblock.c tegra132: move common bootblock init into SoC code 2015-03-26 00:26:42 +01:00
bootblock_asm.S coreboot t132: Stack init re-work 2015-03-04 19:58:30 +01:00
cbfs.c coreboot t132: Enable loading of romstage from CBFS media 2015-03-04 18:16:27 +01:00
cbmem.c tegra132: add support for TZ carve-out 2015-03-05 17:32:19 +01:00
ccplex.c tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
ccplex.h tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
chip.h tegra132: remove private spin table implementation 2015-03-28 07:05:14 +01:00
clk_rst.h Ryu: Rewrite I2C6 mux init 2015-03-28 07:05:38 +01:00
clock.c tegra132: Fix clock apis 2015-03-27 08:04:41 +01:00
clst_clk.h Tegra132: Configure CPU clock 2015-03-17 16:39:22 +01:00
cpu.c tegra132: refactor cpu startup code 2015-03-27 08:03:39 +01:00
cpu_lib.S tegra132: implement smp_processor_id() 2015-03-27 08:03:53 +01:00
dma.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
dma.h coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
emc.h coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
flow.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
funitcfg.c tegra132: Fix clock apis 2015-03-27 08:04:41 +01:00
gic.c tegra132: use generic GIC driver 2015-03-28 07:05:06 +01:00
gpio.h tegra132: provide pad configuration interface 2015-03-24 15:27:40 +01:00
i2c.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
i2c6.c Ryu: Rewrite I2C6 mux init 2015-03-28 07:05:38 +01:00
Kconfig tegra132: Add secmon support 2015-03-28 07:05:10 +01:00
maincpu.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
maincpu.S tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
Makefile.inc Ryu: Move I2C6 init to ramstage 2015-03-28 07:05:39 +01:00
mc.h tegra132: add support for TZ carve-out 2015-03-05 17:32:19 +01:00
mmu_operations.c tegra132: remove printk() before console_init() 2015-03-27 08:04:44 +01:00
mmu_operations.h tegra132: Increase TrustZone Carveout Region size 2015-03-27 08:03:47 +01:00
monotonic_timer.c coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
padconfig.c tegra132: provide pad configuration interface 2015-03-24 15:27:40 +01:00
pinmux.h tegra132: fix gpio constants 2015-03-25 22:31:51 +01:00
pmc.h tegra132: Add special I2C6 init 2015-03-27 08:03:20 +01:00
power.c t132: bring up 64-bit denver core 2015-03-05 17:31:04 +01:00
power.h t132: bring up 64-bit denver core 2015-03-05 17:31:04 +01:00
ramstage.c Tegra132: Configure CPU clock 2015-03-17 16:39:22 +01:00
reset.c tegra132: use pre-existing reset API 2015-03-25 22:31:54 +01:00
romstage.c tegra132: never recover cbmem from romstage 2015-03-27 08:03:15 +01:00
romstage_asm.S coreboot t132: Stack init re-work 2015-03-04 19:58:30 +01:00
sdram.c tegra132: Add LPDDR3 SDRAM init in coreboot. 2015-03-27 08:04:37 +01:00
sdram.h t132: Enable cbmem console support 2015-03-05 17:31:26 +01:00
sdram_lp0.c coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
sdram_param.h coreboot rush: Add dram init code 2015-03-04 18:23:46 +01:00
secmon.c tegra132: Add secmon support 2015-03-28 07:05:10 +01:00
soc.c tegra132: remove private spin table implementation 2015-03-28 07:05:14 +01:00
spi.c tegra132: convert to stopwatch API 2015-03-21 17:01:12 +01:00
spi.h coreboot t132,rush: Add mainboard specific bootblock_init 2015-03-04 18:15:44 +01:00
stack.S coreboot t132: Stack init re-work 2015-03-04 19:58:30 +01:00
sysctr.h tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00
timer.c tegra132: convert to stopwatch API 2015-03-21 17:01:12 +01:00
uart.c tegra132: Enable bootblock support in tegra132 including UART support 2015-03-02 21:17:21 +01:00