Elyes HAOUAS d2b9ec1362 src: Remove unneeded include "{arch,cpu}/cpu.h" ... Change-Id: I17c4fc4e3e2eeef7c720c6a020b37d8f7a0f57a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29300 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2018-11-12 09:22:18 +00:00
..
acpi	sb/intel/i82801ix: Use the common ACPI pirq generator	2018-06-29 07:45:22 +00:00
acpi.c	src: Remove unneeded include "{arch,cpu}/cpu.h"	2018-11-12 09:22:18 +00:00
bootblock.c	src/northbridge: Add and update license headers	2018-05-29 22:36:37 +00:00
chip.h	nb/intel/gm45: Set display backlight according to EDID string	2017-05-03 16:19:03 +02:00
early_init.c
early_reset.c
gm45.h	nb/intel/gm45: Use common code for SMM in TSEG	2018-07-30 19:11:00 +00:00
gma.c	northbridge: Use 'unsigned int' to bare use of 'unsigned'	2018-09-25 14:12:43 +00:00
igd.c	nb/intel/gm45: Don't allow too low values for gfx_uma_size	2017-06-15 00:35:35 +02:00
iommu.c	nb/intel/{gm45,i945,pineview}: Use macro instead of GGC address	2018-10-08 09:44:56 +00:00
Kconfig	nb/intel/gm45: Use common code for SMM in TSEG	2018-07-30 19:11:00 +00:00
Makefile.inc	nb/intel/gm45: Switch to POSTCAR_STAGE	2018-06-05 07:49:30 +00:00
northbridge.c	nb/intel/*: Account for cbmem_top alignment	2018-10-24 10:00:31 +00:00
pcie.c
pm.c	nb/intel/gm45: Use macro instead of magic number	2018-11-08 11:35:07 +00:00
ram_calc.c	src/northbridge: Fix typo	2018-08-09 15:51:10 +00:00
raminit.c	nb/intel/*: Use 2M TSEG instead of 8M on pre-arrandale hardware	2018-10-24 10:04:41 +00:00
raminit_rcomp_calibration.c
raminit_read_write_training.c
raminit_receive_enable_calibration.c	nb/intel/gm45: Fix raminit with mixed raw card types	2017-05-11 16:53:25 +02:00
thermal.c