d448a5e98b
eMMC Controller is taking over 100ms to resume during runtime which results in I/O latency issues on the Skylake systems like Cave and Caroline. This patch adds _DSM method for eMMC comtroller for specifying the device readiness durations. Function index 9 returns package of five integers to set D3 cold delay to zero and ACPI constant Ones for the elements where overriding the default values is not desired. BUG=b:35774937 BRANCH=none TEST=update caroline coreboot and test i/o latency is under 100ms Change-Id: Iacc8aa8560897da8770fe559ca8cd17aaf6ebeba Signed-off-by: Sowmya V <v.sowmya@intel.com> Reviewed-on: https://review.coreboot.org/18532 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org> |
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| broadcom/cygnus | ||
| dmp/vortex86ex | ||
| imgtec/pistachio | ||
| intel | ||
| lowrisc/lowrisc | ||
| marvell | ||
| mediatek/mt8173 | ||
| nvidia | ||
| qualcomm | ||
| rdc/r8610 | ||
| rockchip | ||
| samsung | ||
| ucb/riscv | ||