Michael Niewöhner f00b337525 soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX ... CB:41106 revealed that mb/intel/cedarisland already sets FSP-S UPD (see CB:40735) while the required includes are still missing in CPX. Buildbot did not fail because `ramstage.c` never was (implicitly) included. Fix this problem by making SKX/CPX share a common ramstage header for now by moving the one from SKX. Test: Build cedarisland_crb Change-Id: I9cd25edd167ec71ee98c7ffa4fa6f95ca73a75e9 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>		2020-05-11 08:29:28 +00:00
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cpx	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	2020-05-11 08:29:28 +00:00
include/soc	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	2020-05-11 08:29:28 +00:00
skx	soc/intel/xeon_sp: make CPX ramstage.h common for CPX, SKX	2020-05-11 08:29:28 +00:00
bootblock.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
gpio.c	soc/intel/xeon_sp: Add Lewisburg defs for common/gpio driver	2020-04-07 18:18:42 +00:00
Kconfig	{security,soc}/*/Kconfig: Replace GPLv2 long form headers with SPDX header	2020-05-08 15:26:48 +00:00
lpc.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
Makefile.inc	src: Replace remaining GPLv2 long form headers with SPDX header	2020-05-10 13:12:20 +00:00
reset.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
romstage.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
spi.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
uncore.c	treewide: replace GPLv2 long form headers with SPDX header	2020-05-06 22:20:57 +00:00
util.c	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	2020-03-26 02:06:45 +00:00