coreboot-kgpe-d16/src/soc
Marshall Dawson e1bd38bec5 amd/stoneyridge: Create an MCA structure
Convert the Machine Check reporting to use a newly defined structure.
This will facilitate later patches that will pass pointers to the MSR
values.

BUG=b:65446699
TEST=inspect BERT region, and dmesg, on full patch stack.  Use test
     data plus a failing Grunt system.

Change-Id: I0a98aecc83a0fa1c5ca7926849a89145a595d9ff
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/28476
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-09-07 14:52:03 +00:00
..
amd amd/stoneyridge: Create an MCA structure 2018-09-07 14:52:03 +00:00
broadcom soc/broadcom/cygnus: Increase romstage SRAM size in memlayout 2018-08-13 12:16:32 +00:00
cavium soc/cn81xx: Add vboot support 2018-08-24 12:29:28 +00:00
imgtec soc/imgtec/pistachio: Get rid of device_t 2018-06-04 09:18:19 +00:00
intel fsp_broadwell_de: enable spi console 2018-09-07 10:25:52 +00:00
lowrisc riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00
mediatek mediatek: Refactor memory test code among similar SoCs 2018-09-06 10:29:39 +00:00
nvidia arm64: Remove set_cntfrq() function 2018-08-10 04:16:06 +00:00
qualcomm drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung src: Fix typo 2018-08-10 21:25:53 +00:00
sifive riscv: separately define stack locations at different stages 2018-09-02 03:10:58 +00:00
ucb riscv: add support for modifying compiler options 2018-07-17 18:09:43 +00:00