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Duncan Laurie e4a36c7b52 arch/x86/acpi: Add support for writing ACPI DBG2 table 
Add a function to create an ACPI DBG2 table, which is a Microsoft
ACPI extension for providing a description of the available debug
interface on a board.

A convenience function is provided for creating a DBG2 table with
a 16550 UART based on a PCI device.

This is tested by generating a device and verifying it with iasl:

[000h 0000   4]                    Signature : "DBG2"
[004h 0004   4]                 Table Length : 00000061
[008h 0008   1]                     Revision : 00
[009h 0009   1]                     Checksum : 3B
[00Ah 0010   6]                       Oem ID : "CORE  "
[010h 0016   8]                 Oem Table ID : "COREBOOT"
[018h 0024   4]                 Oem Revision : 00000000
[01Ch 0028   4]              Asl Compiler ID : "CORE"
[020h 0032   4]        Asl Compiler Revision : 00000000

[024h 0036   4]                  Info Offset : 0000002C
[028h 0040   4]                   Info Count : 00000001

[02Ch 0044   1]                     Revision : 00
[02Dh 0045   2]                       Length : 0035
[02Fh 0047   1]               Register Count : 01
[030h 0048   2]              Namepath Length : 000F
[032h 0050   2]              Namepath Offset : 0026
[034h 0052   2]              OEM Data Length : 0000
[036h 0054   2]              OEM Data Offset : 0000
[038h 0056   2]                    Port Type : 8000
[03Ah 0058   2]                 Port Subtype : 0000
[03Ch 0060   2]                     Reserved : 0000
[03Eh 0062   2]          Base Address Offset : 0016
[040h 0064   2]          Address Size Offset : 0022

[042h 0066  12]        Base Address Register : [Generic Address Structure]
[042h 0066   1]                     Space ID : 00 [SystemMemory]
[043h 0067   1]                    Bit Width : 00
[044h 0068   1]                   Bit Offset : 00
[045h 0069   1]         Encoded Access Width : 03 [DWord Access:32]
[046h 0070   8]                      Address : 00000000FE034000

[04Eh 0078   4]                 Address Size : 00001000

[052h 0082  15]                     Namepath : "\_SB.PCI0.UAR2"

Raw Table Data: Length 97 (0x61)

  0000: 44 42 47 32 61 00 00 00 00 3B 43 4F 52 45 20 20  // DBG2a....;CORE
  0010: 43 4F 52 45 42 4F 4F 54 00 00 00 00 43 4F 52 45  // COREBOOT....CORE
  0020: 00 00 00 00 2C 00 00 00 01 00 00 00 00 35 00 01  // ....,........5..
  0030: 0F 00 26 00 00 00 00 00 00 80 00 00 00 00 16 00  // ..&.............
  0040: 22 00 00 00 00 03 00 40 03 FE 00 00 00 00 00 10  // "......@........
  0050: 00 00 5C 5F 53 42 2E 50 43 49 30 2E 55 41 52 32  // ..\_SB.PCI0.UAR2
  0060: 00                                               // .

Change-Id: I55aa3f24776b2f8aa38d7da117f422d8b8ec5479
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/22452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-11-15 16:07:14 +00:00
..
acpi
include arch/x86/acpi: Add support for writing ACPI DBG2 table 2017-11-15 16:07:14 +00:00
acpi.c arch/x86/acpi: Add support for writing ACPI DBG2 table 2017-11-15 16:07:14 +00:00
acpi_device.c acpigen: Add stop gpio control to power resource 2017-08-30 16:40:14 +00:00
acpi_s3.c arch/x86: Include acpi_s3.c support in postcar stage 2017-09-22 15:29:25 +00:00
acpigen.c arch/x86/acpigen: Add function to write a CPU package 2017-11-04 17:23:06 +00:00
acpigen_dsm.c arch/x86/acpigen: Fix acpigen for If (Lequal (...)) 2016-11-16 01:08:06 +01:00
assembly_entry.S arch/x86/assembly_entry: Align stack for car_stage_entry 2017-07-13 16:48:22 +00:00
boot.c arch/x86: Wrap lines at 80 columns 2017-03-17 03:18:24 +01:00
bootblock.ld
bootblock_crt0.S arch/x86: Support "weak" BIST and timestamp save routines 2016-06-11 19:22:42 +02:00
bootblock_normal.c Port cmos.default handling to C environment bootblock 2017-07-26 19:30:01 +00:00
bootblock_romcc.S arch/x86: Rename bootblock.S to bootblock_romcc.S 2016-01-30 03:11:12 +01:00
bootblock_simple.c Port cmos.default handling to C environment bootblock 2017-07-26 19:30:01 +00:00
c_start.S arch/*: Update Kconfig symbol usage 2017-07-07 16:05:16 +00:00
car.ld commonlib: Move drivers/storage into commonlib/storage 2017-05-12 18:20:33 +02:00
cbfs_and_run.c arch/x86: Fix most of remaining issues detected by checkpatch 2017-03-20 16:36:24 +01:00
cbmem.c AGESA boards: Fix regressions with LATE_CBMEM_INIT 2017-07-17 19:25:34 +00:00
cpu.c arch/x86: Fix most of remaining issues detected by checkpatch 2017-03-20 16:36:24 +01:00
cpu_common.c arch/x86: add missing license headers 2016-01-14 23:37:06 +01:00
crt0_romcc_epilogue.inc src/arch: Update license headers missing paragraph 2 2016-01-26 04:44:20 +01:00
ebda.c arch/x86: initialize EBDA in S3 and S0/S5 path 2017-10-16 16:56:19 +00:00
exception.c arch/*: Update Kconfig symbol usage 2017-07-07 16:05:16 +00:00
exit_car.S arch/x86: update assembly to ensure 16-byte alignment into C 2017-06-29 14:58:59 +00:00
failover.ld arch/x86: rename reset_vector -> _start 2016-03-04 01:16:05 +01:00
gdt.c arch/x86/gdt: Move variable assignment down 2017-11-03 15:20:15 +00:00
id.ld arch/x86: add missing license headers 2016-01-14 23:37:06 +01:00
id.S arch/x86: Wrap lines at 80 columns 2017-03-17 03:18:24 +01:00
ioapic.c arch/*: Update Kconfig symbol usage 2017-07-07 16:05:16 +00:00
Kconfig arch/x86: Enable ebda library for romstage and postcar 2017-09-22 15:29:30 +00:00
Makefile.inc arch/x86: Enable ebda library for romstage and postcar 2017-09-22 15:29:30 +00:00
memcpy.c arch/x86: add missing license headers 2016-01-14 23:37:06 +01:00
memlayout.ld arch/x86: introduce postcar stage/phase 2016-03-23 14:24:30 +01:00
memmove.c arch/x86: Fix space issues detected by checkpatch 2017-03-17 03:17:39 +01:00
memset.c arch/x86: Wrap lines at 80 columns 2017-03-17 03:18:24 +01:00
mmap_boot.c arch/x86: Fix most of remaining issues detected by checkpatch 2017-03-20 16:36:24 +01:00
mpspec.c arch/x86: Fix most of remaining issues detected by checkpatch 2017-03-20 16:36:24 +01:00
pci_ops_conf1.c src: add IS_ENABLED() around Kconfig symbol references 2017-07-13 23:57:07 +00:00
pci_ops_mmconf.c arch/x86: Wrap lines at 80 columns 2017-03-17 03:18:24 +01:00
pirq_routing.c arch/*: Update Kconfig symbol usage 2017-07-07 16:05:16 +00:00
postcar.c arch/x86: Make postcar TempRamExit call generic 2017-08-17 17:52:21 +00:00
postcar_loader.c arch/x86: Fix typo with MTRR 2017-09-13 17:26:27 +00:00
prologue.inc
rdrand.c arch/x86: Make rdrand.c clang friendly 2017-06-22 04:11:02 +00:00
romcc_console.c arch/*: Update Kconfig symbol usage 2017-07-07 16:05:16 +00:00
smbios.c SMBIOS: Correct length calculation for empty string table 2017-08-10 15:56:45 +00:00
stages.c
tables.c arch/x86: Restore forwarding table on resume for non EARLY_EBDA_INIT 2017-10-29 01:59:18 +00:00
thread.c arch/x86: Fix space issues detected by checkpatch 2017-03-17 03:17:39 +01:00
thread_switch.S
timestamp.c
verstage.c vboot: Remove CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL Kconfig option 2017-03-28 22:14:03 +02:00
wakeup.S arch/x86: remove .intel_syntax 2016-01-23 17:01:44 +01:00
walkcbfs.S arch/x86: Wrap lines at 80 columns 2017-03-17 03:18:24 +01:00