coreboot-kgpe-d16/src
Jon Murphy b4156412db mb/google/skyrim: Enable USB controllers in devicetree
BUG=b:214413631
TEST=builds

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I9ca2c16d97e064b32400356e1de37f3f70155a07
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62152
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-02-26 00:39:02 +00:00
..
acpi arch/x86: consolidate HPET base address definitions 2022-02-25 17:44:11 +00:00
arch arch/x86: consolidate HPET base address definitions 2022-02-25 17:44:11 +00:00
commonlib compiler.h: Define a __fallthrough statement 2022-02-16 21:28:09 +00:00
console console: Fix LOG_FAST macro 2022-02-22 23:13:50 +00:00
cpu cpu,mb,nb,soc: use HPET_BASE_ADDRESS instead of magic number 2022-02-25 17:44:45 +00:00
device treewide: Get rid of CONFIG_AZALIA_MAX_CODECS 2022-02-22 17:40:30 +00:00
drivers cr50: Increase cr50 i2c probe timeout 2022-02-23 16:26:03 +00:00
ec ec/google/chromeec/ec_acpi.c: Cast compatible enum types 2022-02-21 15:27:15 +00:00
include include/acpi/acpi.h: Drop non-existing acpi_create_madt_lapic_nmis() 2022-02-22 00:02:27 +00:00
lib Use the fallthrough statement in switch loops 2022-02-16 21:29:53 +00:00
mainboard mb/google/skyrim: Enable USB controllers in devicetree 2022-02-26 00:39:02 +00:00
northbridge cpu,mb,nb,soc: use HPET_BASE_ADDRESS instead of magic number 2022-02-25 17:44:45 +00:00
security security/intel/stm: Make STM setup MP safe 2022-02-24 00:27:37 +00:00
soc soc/intel/fast_spi: Check SPI Cycle In-Progress prior start HW Seq 2022-02-26 00:15:28 +00:00
southbridge sb/intel/ibexpeak/early_pch.c: Use PCI_BASE_ADDRESS_0 macro 2022-02-25 20:42:36 +00:00
superio Use the fallthrough statement in switch loops 2022-02-16 21:29:53 +00:00
vendorcode vendorcode/intel/fsp: Update FSP header file for Alder Lake N FSP v3054.02 2022-02-22 18:27:06 +00:00
Kconfig src/Kconfig: Update the path to 'c_start.S' for GDB_STUB config 2022-02-22 20:49:10 +00:00