coreboot-kgpe-d16/src/superio
Frans Hendriks 2e1fea408d superio: Add ASpeed AST2400
Add support for ASpeed AST2400.
This device uses write twice 0xA5 to enter config mode.

BUG = N/A
TEST = ASRock D1521D4U

Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/23135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-05-24 07:22:23 +00:00
..
acpi src: Don't use a #defines like Kconfig symbols 2019-01-28 13:41:28 +00:00
aspeed superio: Add ASpeed AST2400 2019-05-24 07:22:23 +00:00
common superio: Add ASpeed AST2400 2019-05-24 07:22:23 +00:00
fintek superio/fintek/f71808a: Add more optional ramstage registers 2019-05-01 00:09:57 +00:00
intel device/pnp: Add header files for PNP ops 2019-03-04 15:58:55 +00:00
ite superio/ite: Add IT8786E-I 2019-05-15 17:45:41 +00:00
nsc src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
nuvoton src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
renesas src: include <assert.h> when appropriate 2019-04-23 10:01:36 +00:00
serverengines device/pnp: Add header files for PNP ops 2019-03-04 15:58:55 +00:00
smsc src: include <assert.h> when appropriate 2019-04-23 10:01:36 +00:00
via coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
winbond src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
Makefile.inc superio: Add ASpeed AST2400 2019-05-24 07:22:23 +00:00