Nico Huber 47bf498681 nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree ... Some Sandy Bridge boards disabled the PCI-to-PCI bridge early to avoid probing by the MRC. We can do that for all boards instead, based on the devicetree setting. Change-Id: Ie64774628fde77db2a379bdba6a921a31e52fa0d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>		2019-11-18 11:52:24 +00:00
..
acpi	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	2019-03-08 08:33:24 +00:00
acpi_tables.c
board_info.txt
devicetree.cb	mb/intel/dcp847ske: Disable xHCI via devicetree	2019-11-18 11:51:38 +00:00
dsdt.asl	mb/*/*{bd82x6x/ibexpreak}: Use sb/intel/common/acpi/platform.asl	2019-11-04 11:36:39 +00:00
early_southbridge.c	nb/intel/sandybridge/mrc: Handle P2P disabling via devicetree	2019-11-18 11:52:24 +00:00
gma-mainboard.ads
gpio.c
hda_verb.c
Kconfig	src/mb/Kconfig: Fix PCI subsystem IDs	2019-04-19 17:48:15 +00:00
Kconfig.name
mainboard.c	mb/intel: Get rid of device_t	2018-05-08 14:18:52 +00:00
Makefile.inc	nb/intel/sandybridge: Set up console in bootblock	2019-11-18 11:48:35 +00:00
romstage.c	nb/intel/sandybridge: Drop pch.h from sandybridge.h	2019-04-23 10:06:01 +00:00
smihandler.c
superio.h	intel/dcp847ske: use functions from hwm5_conf.h for HWM setup	2019-10-08 18:08:19 +00:00
thermal.h
usb.h