Julien Viard de Galbert f528195bdf soc/intel/denverton_ns: re-factor HSIO configuration ... The main goal is to allow configuring the HSIO lines from the mainboard code. Also share the code for both romstage and ramstage. Remove explicit dependency on the harcuvar mainboard. Change-Id: Iec65472207309eae878d14eef5bc644b80fdbb1d Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net> Reviewed-on: https://review.coreboot.org/22309 Reviewed-by: FEI WANG <wangfei.jimei@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2017-11-07 12:32:53 +00:00
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amd	soc/amd/common/psp: Require PSP PCI definition in SOC	2017-11-06 22:21:50 +00:00
broadcom	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
dmp	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
imgtec	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
intel	soc/intel/denverton_ns: re-factor HSIO configuration	2017-11-07 12:32:53 +00:00
lowrisc	RISC-V boards: Stop using the config string	2017-11-07 12:31:00 +00:00
marvell	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
mediatek	soc/mediatek/mt8173: Remove cast of NULL* to void *	2017-11-03 16:03:30 +00:00
nvidia	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
qualcomm	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
rockchip	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
samsung	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00
ucb	RISC-V boards: Stop using the config string	2017-11-07 12:31:00 +00:00