coreboot-kgpe-d16/src/mainboard/google/dragonegg
Subrata Banik d19b3ca90d soc/intel/icelake: Make use of common thermal code for ICL
This patch ports CB:34522 and CB:33147 changes from CNL to ICL.

TEST=Build and boot dragonegg

Change-Id: I0b983005f16fe182e634eac63fef4f6b22197a85
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34649
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-02 04:34:26 +00:00
..
spd
variants soc/intel/icelake: Make use of common thermal code for ICL 2019-08-02 04:34:26 +00:00
acpi_tables.c
board_info.txt
bootblock.c
chromeos.c mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__ 2019-07-25 16:03:37 +00:00
chromeos.fmd mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files 2019-03-05 20:52:06 +00:00
dsdt.asl coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
ec.c
Kconfig soc/mainboard: Update mainboard UART Kconfig 2019-01-11 18:59:21 +00:00
Kconfig.name
mainboard.c mb/google/dragonegg: Don't use device_t 2018-12-03 13:01:29 +00:00
Makefile.inc arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class 2019-07-09 12:43:35 +00:00
ramstage.c
romstage_fsp_params.c mb/google/dragonegg: Pass FSP-M UPD as per dragonegg requirement 2019-06-09 02:47:55 +00:00
smihandler.c