coreboot-kgpe-d16/src/soc/broadcom/cygnus/Kconfig

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##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
Remove address from GPLv2 headers As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-03-26 15:17:45 +01:00
## Foundation, Inc.
##
config SOC_BROADCOM_CYGNUS
bool
default n
select ARCH_BOOTBLOCK_ARMV7
select ARCH_RAMSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_VERSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
select HAS_PRECBMEM_TIMESTAMP_REGION
select SEPARATE_VERSTAGE
select RETURN_FROM_VERSTAGE
select GENERIC_GPIO_LIB
if SOC_BROADCOM_CYGNUS
config BOOTBLOCK_CPU_INIT
string
default "soc/broadcom/cygnus/bootblock.c"
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on DRIVERS_UART
default 0x18023000
config CYGNUS_DDR800
bool "DDR Speed at 800MHz"
default y
broadcom/cygnus: Enable DDR auto self-refresh Enable auto entry and auto exit self-refresh. Configure entry idle time to 16x long count sequences. Where a long count sequence is 1024 cycles. The idle entry configuration is based on 32x of the DLL lock time (512 cycles). A conservative setting to help minimize self-refresh enter/exit thrashing. BUG=chrome-os-partner:36456 BRANCH=broadcom-firmware TEST=When enable configuration CYGNUS_SDRAM_TEST_DDR, print on console: sdram initialization is completed. test ddr start from 0x60000000 to 0x80000000 ... test ddr end: fail=0 Translation table is @ 02004000 Mapping address range [0x00000000:0x00000000) as uncached Change-Id: Ibad220429fd52ead2933db03bec1a555f9385e53 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3768f82ca268fb854f8c4753916518a1efdf887d Original-Reviewed-on: https://chrome-internal-review.googlesource.com/212125 Original-Reviewed-by: Scott Branden <sbranden@broadcom.com> Original-Reviewed-by: Daisuke Nojiri <dnojiri@google.com> Original-Commit-Queue: Daisuke Nojiri <dnojiri@google.com> Original-Tested-by: Daisuke Nojiri <dnojiri@google.com> Original-Signed-off-by: Icarus Chau <ichau@broadcom.com> Original-Change-Id: Icac1e12745d048b32e1804a546f6b49c8b5953c0 Original-Reviewed-on: https://chromium-review.googlesource.com/265862 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Trybot-Ready: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: http://review.coreboot.org/9930 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-08 01:09:24 +02:00
config CYGNUS_DDR_AUTO_SELF_REFRESH_ENABLE
bool "Enable DDR auto self-refresh"
default y
help
Warning: M0 expects that auto self-refresh is enabled. Modify
with caution.
config CYGNUS_SHMOO_REUSE_DDR_32BIT
bool "Indicate if DDR width is 32-bit"
default n
config CYGNUS_SDRAM_TEST_DDR
bool "Run a write-read test on DDR after initialization"
default n
config CYGNUS_PRINT_SHMOO_DEBUG
bool "Print debug info for shmoo"
default n
config CYGNUS_GPIO_TEST
bool "Run a test on gpio"
default n
endif