2005-07-06 19:00:18 +02:00
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#define ASSEMBLY 1
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#define ASM_CONSOLE_LOGLEVEL 8
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <arch/romcc_io.h>
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#include <arch/hlt.h>
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#include "pc80/mc146818rtc_early.c"
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#include "pc80/serial.c"
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#include "arch/i386/lib/console.c"
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#include "ram/ramtest.c"
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#include "cpu/x86/bist.h"
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2005-07-06 19:16:11 +02:00
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//#include "lib/delay.c"
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2006-03-17 23:48:23 +01:00
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void setup_pars(void)
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{
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volatile unsigned long *par;
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/* as per the book: */
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/* PAR register setup */
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/* set up the PAR registers as they are on the MSM586SEG */
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par = (unsigned long *) 0xfffef088;
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/* NOTE: move this to mainboard.c ASAP */
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*par++ = 0x607c00a0; /*PAR0: PCI:Base 0xa0000; size 0x1f000:*/
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*par++ = 0x480400d8; /*PAR1: GP BUS MEM:CS2:Base 0xd8, size 0x4:*/
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*par++ = 0x340100ea; /*PAR2: GP BUS IO:CS5:Base 0xea, size 0x1:*/
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*par++ = 0x380701f0; /*PAR3: GP BUS IO:CS6:Base 0x1f0, size 0x7:*/
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*par++ = 0x3c0003f6; /*PAR4: GP BUS IO:CS7:Base 0x3f6, size 0x0:*/
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*par++ = 0x35ff0400; /*PAR5: GP BUS IO:CS5:Base 0x400, size 0xff:*/
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*par++ = 0x35ff0600; /*PAR6: GP BUS IO:CS5:Base 0x600, size 0xff:*/
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*par++ = 0x35ff0800; /*PAR7: GP BUS IO:CS5:Base 0x800, size 0xff:*/
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*par++ = 0x35ff0a00; /*PAR8: GP BUS IO:CS5:Base 0xa00, size 0xff:*/
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*par++ = 0x35ff0e00; /*PAR9: GP BUS IO:CS5:Base 0xe00, size 0xff:*/
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*par++ = 0x34fb0104; /*PAR10: GP BUS IO:CS5:Base 0x104, size 0xfb:*/
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*par++ = 0x35af0200; /*PAR11: GP BUS IO:CS5:Base 0x200, size 0xaf:*/
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*par++ = 0x341f03e0; /*PAR12: GP BUS IO:CS5:Base 0x3e0, size 0x1f:*/
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*par++ = 0xe41c00c0; /*PAR13: SDRAM:code:cache:nowrite:Base 0xc0000, size 0x7000:*/
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*par++ = 0x545c00c8; /*PAR14: GP BUS MEM:CS5:Base 0xc8, size 0x5c:*/
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*par++ = 0x8a020200; /*PAR15: BOOTCS:code:nocache:write:Base 0x2000000, size 0x80000:*/
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}
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2005-07-06 19:00:18 +02:00
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#include "cpu/amd/sc520/raminit.c"
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2005-07-06 19:17:41 +02:00
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typedef void (*lj)(void);
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2005-07-06 19:03:01 +02:00
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struct mem_controller {
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int i;
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};
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2005-07-06 19:00:18 +02:00
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static void hard_reset(void)
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{
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}
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static void memreset_setup(void)
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{
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}
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static void memreset(int controllers, const struct mem_controller *ctrl)
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{
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}
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static inline void activate_spd_rom(const struct mem_controller *ctrl)
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{
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/* nothing to do */
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}
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static inline int spd_read_byte(unsigned device, unsigned address)
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{
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2005-07-06 19:03:01 +02:00
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// return smbus_read_byte(device, address);
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2005-07-06 19:00:18 +02:00
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}
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2005-07-06 19:03:01 +02:00
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//#include "sdram/generic_sdram.c"
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2005-07-06 19:00:18 +02:00
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2005-07-06 19:17:41 +02:00
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static inline void dumpmem(void){
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int i, j;
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unsigned char *l;
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unsigned char c;
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for(i = 0x4000; i < 0x5000; i += 16) {
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print_err_hex32(i); print_err(":");
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for(j = 0; j < 16; j++) {
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l = (unsigned char *)i + j;
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c = *l;
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print_err_hex8(c);
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print_err(" ");
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}
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print_err("\r\n");
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}
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}
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2005-09-12 15:40:10 +02:00
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static inline void irqinit(void){
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volatile unsigned char *cp;
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#if 0
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/* these values taken from the msm board itself.
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* and they cause the board to not even come out of calibrating_delay_loop
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* if you can believe it. Our problem right now is no IDE or serial interrupts
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* So we'll try to put interrupts in, one at a time. IDE first.
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*/
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cp = (volatile unsigned char *) 0xfffefd00;
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*cp = 0x11;
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cp = (volatile unsigned char *) 0xfffefd02;
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*cp = 0x02;
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cp = (volatile unsigned char *) 0xfffefd03;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd04;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd08;
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*cp = 0xf7;
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cp = (volatile unsigned char *) 0xfffefd0a;
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*cp = 0x8b;
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cp = (volatile unsigned char *) 0xfffefd10;
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*cp = 0x18;
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cp = (volatile unsigned char *) 0xfffefd14;
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*cp = 0x09;
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cp = (volatile unsigned char *) 0xfffefd18;
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*cp = 0x88;
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cp = (volatile unsigned char *) 0xfffefd1a;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1b;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd1c;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd20;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd21;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd22;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd28;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd29;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd30;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd31;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd32;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd33;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd40;
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*cp = 0x10;
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cp = (volatile unsigned char *) 0xfffefd41;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd42;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd43;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd44;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd45;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd46;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd50;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd51;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd52;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd53;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd54;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd55;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0x37;
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cp = (volatile unsigned char *) 0xfffefd57;
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*cp = 0x00;
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cp = (volatile unsigned char *) 0xfffefd58;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd59;
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*cp = 0xff;
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cp = (volatile unsigned char *) 0xfffefd5a;
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*cp = 0xff;
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#endif
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#if 0
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/* this fails too */
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/* IDE only ... */
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cp = (volatile unsigned char *) 0xfffefd56;
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*cp = 0xe;
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#endif
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}
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2006-03-17 23:48:23 +01:00
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2005-07-06 19:00:18 +02:00
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static void main(unsigned long bist)
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{
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2005-07-06 19:16:23 +02:00
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volatile int i;
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for(i = 0; i < 100; i++)
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;
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2005-07-06 19:00:18 +02:00
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2005-07-06 19:16:11 +02:00
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setupsc520();
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2005-09-12 15:40:10 +02:00
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irqinit();
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2005-07-06 19:00:18 +02:00
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uart_init();
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console_init();
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2005-07-06 19:16:23 +02:00
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for(i = 0; i < 100; i++)
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print_err("fill usart\r\n");
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// while(1)
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2005-07-06 19:16:13 +02:00
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print_err("HI THERE!\r\n");
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2005-07-06 19:16:23 +02:00
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// sizemem();
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staticmem();
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2005-07-06 19:17:41 +02:00
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print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60);
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print_err("\n");
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2005-07-06 19:16:21 +02:00
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2005-07-06 19:16:23 +02:00
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// while(1)
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2005-07-06 19:16:15 +02:00
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print_err("STATIC MEM DONE\r\n");
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2005-07-06 19:16:23 +02:00
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outb(0xee, 0x80);
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print_err("loop forever ...\n");
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2005-07-06 19:16:13 +02:00
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2005-07-06 19:00:18 +02:00
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#if 0
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2005-07-06 19:17:41 +02:00
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/* clear memory 1meg */
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2005-07-06 19:00:18 +02:00
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__asm__ volatile(
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2005-07-06 19:17:41 +02:00
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"1: \n\t"
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"movl %0, %%fs:(%1)\n\t"
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"addl $4,%1\n\t"
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"subl $4,%2\n\t"
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"jnz 1b\n\t"
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:
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: "a" (0), "D" (0), "c" (1024*1024)
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);
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2005-07-06 19:00:18 +02:00
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#endif
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2005-07-06 19:17:41 +02:00
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2005-07-06 19:00:18 +02:00
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#if 0
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dump_pci_devices();
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#endif
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#if 0
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dump_pci_device(PCI_DEV(0, 0, 0));
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#endif
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2005-07-06 19:17:41 +02:00
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2005-07-06 19:16:23 +02:00
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#if 0
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2005-07-06 19:16:15 +02:00
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print_err("RAM CHECK!\r\n");
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2005-07-06 19:00:18 +02:00
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// Check 16MB of memory @ 0
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ram_check(0x00000000, 0x01000000);
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#endif
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2005-07-06 19:17:41 +02:00
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#if 0
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print_err("RAM CHECK for 32 MB!\r\n");
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// Check 32MB of memory @ 0
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ram_check(0x00000000, 0x02000000);
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#endif
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2005-09-12 15:40:10 +02:00
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#if 1
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2005-07-06 19:17:41 +02:00
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{
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2005-09-12 15:40:10 +02:00
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volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000;
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2005-07-06 19:17:41 +02:00
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volatile unsigned char *dst = (unsigned char *) 0x4000;
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2005-09-12 15:40:10 +02:00
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for(i = 0; i < 0x20000; i++) {
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2005-07-06 19:17:41 +02:00
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/*
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print_err("Set dst "); print_err_hex32((unsigned long) dst);
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print_err(" to "); print_err_hex32(*src); print_err("\r\n");
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*/
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*dst = *src;
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//print_err(" dst is now "); print_err_hex32(*dst); print_err("\r\n");
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dst++, src++;
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outb((unsigned char)i, 0x80);
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}
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}
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dumpmem();
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outb(0, 0x80);
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print_err("loop forever\r\n");
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outb(0xdd, 0x80);
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__asm__ volatile(
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"movl %0, %%edi\n\t"
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"jmp *%%edi\n\t"
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:
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: "a" (0x4000)
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);
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print_err("FUCK\r\n");
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while(1);
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2005-07-06 19:16:23 +02:00
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#endif
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2005-07-06 19:00:18 +02:00
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}
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2005-07-06 19:17:41 +02:00
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