2009-08-12 17:00:51 +02:00
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##
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2010-01-20 19:44:30 +01:00
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## This file is part of the coreboot project.
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2009-08-12 17:00:51 +02:00
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##
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2010-01-20 19:44:30 +01:00
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## Copyright (C) 2009-2010 coresystems GmbH
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2009-08-12 17:00:51 +02:00
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##
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2010-01-20 19:44:30 +01:00
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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2009-08-12 17:00:51 +02:00
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##
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mainmenu "Coreboot Configuration"
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2009-10-05 15:55:28 +02:00
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menu "General setup"
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2009-10-18 20:35:50 +02:00
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config EXPERT
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bool "Expert mode"
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help
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This allows you to select certain advanced configuration options.
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Warning: Only enable this option if you really know what you are
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doing! You have been warned!
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2009-10-05 15:55:28 +02:00
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config LOCALVERSION
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2009-10-07 18:15:40 +02:00
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string "Local version string"
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2009-10-05 15:55:28 +02:00
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help
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Append an extra string to the end of the coreboot version.
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2009-10-07 18:15:40 +02:00
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This can be useful if, for instance, you want to append the
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respective board's hostname or some other identifying string to
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the coreboot version number, so that you can easily distinguish
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boot logs of different boards from each other.
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2010-02-09 20:35:16 +01:00
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config CBFS_PREFIX
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string "CBFS prefix to use"
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default "fallback"
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help
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Select the prefix to all files put into the image. It's "fallback"
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by default, "normal" is a common alternative.
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2010-03-16 02:17:19 +01:00
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choice
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prompt "Compiler"
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default COMPILER_GCC
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help
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This option allows you to select the compiler used for building
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coreboot.
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config COMPILER_GCC
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bool "GCC"
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config COMPILER_LLVM_CLANG
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bool "LLVM/clang"
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endchoice
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2010-03-14 22:25:03 +01:00
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config SCANBUILD_ENABLE
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2010-03-16 02:17:19 +01:00
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bool "Build with scan-build for static analysis"
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2010-03-14 22:25:03 +01:00
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default n
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help
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Changes the build process to scan-build is used.
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Requires scan-build in path.
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config SCANBUILD_REPORT_LOCATION
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2010-03-16 02:17:19 +01:00
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string "Directory to put scan-build report in"
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2010-03-14 22:25:03 +01:00
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default ""
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depends on SCANBUILD_ENABLE
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help
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Where the scan-build report should be stored
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2010-03-25 22:45:25 +01:00
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config CCACHE
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bool "ccache"
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default n
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help
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Enables the use of ccache for faster builds.
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Requires ccache in path.
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2010-08-09 15:28:18 +02:00
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config SCONFIG_GENPARSER
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bool "Generate SCONFIG parser using flex and bison"
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default n
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depends on EXPERT
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help
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Enable this option if you are working on the sconfig
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device tree parser and made changes to sconfig.l and
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sconfig.y.
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Otherwise, say N.
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2010-05-19 20:41:15 +02:00
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config USE_OPTION_TABLE
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bool "Use CMOS for configuration values"
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default n
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2010-07-06 23:05:04 +02:00
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depends on HAVE_OPTION_TABLE
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2010-05-19 20:41:15 +02:00
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help
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Enable this option if coreboot shall read options from the "CMOS"
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NVRAM instead of using hard coded values.
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2009-10-05 15:55:28 +02:00
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endmenu
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2009-08-12 17:00:51 +02:00
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source src/mainboard/Kconfig
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source src/arch/i386/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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menu "Chipset"
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comment "CPU"
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source src/cpu/Kconfig
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comment "Northbridge"
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2009-08-12 17:00:51 +02:00
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source src/northbridge/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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comment "Southbridge"
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2009-08-12 17:00:51 +02:00
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source src/southbridge/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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comment "Super I/O"
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2009-08-12 17:00:51 +02:00
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source src/superio/Kconfig
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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comment "Devices"
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source src/devices/Kconfig
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endmenu
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2009-08-12 17:00:51 +02:00
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2010-05-16 17:31:53 +02:00
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menu "Generic Drivers"
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source src/drivers/Kconfig
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endmenu
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2009-08-12 17:00:51 +02:00
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config PCI_BUS_SEGN_BITS
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2009-09-24 17:09:11 +02:00
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int
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default 0
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2009-09-24 11:03:06 +02:00
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2009-08-12 17:00:51 +02:00
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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2009-08-25 02:53:22 +02:00
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hex
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2009-10-09 13:47:21 +02:00
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default 0x0
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2009-08-12 17:00:51 +02:00
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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2009-08-25 02:53:22 +02:00
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hex
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2009-10-09 13:47:21 +02:00
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default 0x0
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2009-08-12 17:00:51 +02:00
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config CPU_ADDR_BITS
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int
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default 36
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config LOGICAL_CPUS
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2009-09-22 20:49:08 +02:00
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bool
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default y
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2009-08-12 17:00:51 +02:00
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config PCI_ROM_RUN
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2009-08-25 19:38:24 +02:00
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bool
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default n
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2009-08-12 17:00:51 +02:00
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config HEAP_SIZE
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hex
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2009-10-16 21:12:49 +02:00
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default 0x4000
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2009-08-12 17:00:51 +02:00
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config MAX_CPUS
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int
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default 1
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config MMCONF_SUPPORT_DEFAULT
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bool
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default n
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config MMCONF_SUPPORT
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bool
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default n
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2009-10-09 14:32:52 +02:00
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config ATI_RAGE_XL
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bool
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2009-08-12 17:00:51 +02:00
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source src/console/Kconfig
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config HAVE_ACPI_RESUME
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bool
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default n
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2010-06-05 12:03:08 +02:00
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config HAVE_ACPI_SLIC
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bool
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default n
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2009-08-12 17:00:51 +02:00
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config ACPI_SSDTX_NUM
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int
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default 0
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config HAVE_HARD_RESET
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bool
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2010-02-27 09:39:04 +01:00
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default y if BOARD_HAS_HARD_RESET
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2009-10-09 13:47:21 +02:00
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default n
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2010-02-27 09:39:04 +01:00
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help
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This variable specifies whether a given board has a hard_reset
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function, no matter if it's provided by board code or chipset code.
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2009-08-12 17:00:51 +02:00
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config HAVE_INIT_TIMER
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bool
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2010-01-04 21:09:27 +01:00
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default n if UDELAY_IO
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2009-10-26 16:14:07 +01:00
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default y
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2009-08-12 17:00:51 +02:00
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config HAVE_MAINBOARD_RESOURCES
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bool
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default n
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2010-07-06 23:05:04 +02:00
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config USE_OPTION_TABLE
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bool
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default n
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2009-08-12 17:00:51 +02:00
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config HAVE_OPTION_TABLE
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bool
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2010-07-06 23:05:04 +02:00
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default n
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2009-10-15 19:49:07 +02:00
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help
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This variable specifies whether a given board has a cmos.layout
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file containing NVRAM/CMOS bit definitions.
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2010-07-06 23:05:04 +02:00
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It defaults to 'n' but can be selected in mainboard/*/Kconfig.
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2009-08-12 17:00:51 +02:00
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config PIRQ_ROUTE
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bool
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default n
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config HAVE_SMI_HANDLER
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bool
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default n
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config PCI_IO_CFG_EXT
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bool
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default n
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config IOAPIC
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bool
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default n
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
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# TODO: Can probably be removed once all chipsets have kconfig options for it.
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2009-10-04 19:15:39 +02:00
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config VIDEO_MB
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int
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Add kconfig menus for most chipset VIDEO_MB values.
VIDEO_MB is a variable that defines how many MB of RAM will be used
for onboard graphics frame buffer. It's northbridge-dependent which
values for CONFIG_MB are valid (but not board-dependent).
This patch adds choices for menuconfig to select the VIDEO_MB value for:
- Intel 82810
- Intel 82830
- VIA CN400
- VIA CN700
Note: CN400 and CN700 are based on the CX700 datasheet, not sure if they're
correct. If somebody has CN400 and CN700 datasheets, please verify.
We drop all per-board VIDEO_MB variables in per-board Kconfig files as
there's a northbridge-specific option/default now (plus the user can override
the value if needed in menuconfig).
As CONFIG_MB is chipset-specific but not board-specific (and never was), filter
it in util/compareboard/compareboard, we don't need to match those values.
Finally, put "CPU", "Northbridge", "Southbridge", "Super I/O", and
"Devices" sections into the "Chipset" menu, where NB-specific
options will appear if you select a board using a certain NB,
SB-specific options would appear in the "Southbridge" section etc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 22:42:13 +01:00
|
|
|
default 0
|
2009-10-04 19:15:39 +02:00
|
|
|
|
2009-09-22 20:49:08 +02:00
|
|
|
config USE_WATCHDOG_ON_BOOT
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
|
|
|
|
config VGA
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
Build board-specific VGA code.
|
|
|
|
|
|
|
|
|
|
config GFXUMA
|
|
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default n
|
2009-09-22 20:49:08 +02:00
|
|
|
help
|
|
|
|
|
Enable Unified Memory Architecture for graphics.
|
|
|
|
|
|
2009-08-25 02:53:22 +02:00
|
|
|
# TODO
|
|
|
|
|
# menu "Drivers"
|
2009-10-07 18:15:40 +02:00
|
|
|
#
|
2009-08-25 02:53:22 +02:00
|
|
|
# endmenu
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config HAVE_ACPI_TABLES
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has ACPI table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the ACPI tables are actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_ACPI_TABLES.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
|
|
|
|
config HAVE_MP_TABLE
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has MP table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the MP table is actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_MP_TABLE.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
|
|
|
|
config HAVE_PIRQ_TABLE
|
|
|
|
|
bool
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
This variable specifies whether a given board has PIRQ table support.
|
|
|
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
|
Whether or not the PIRQ table is actually generated by coreboot
|
|
|
|
|
is configurable by the user via GENERATE_PIRQ_TABLE.
|
2009-10-15 15:35:47 +02:00
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
#These Options are here to avoid "undefined" warnings.
|
|
|
|
|
#The actual selection and help texts are in the following menu.
|
|
|
|
|
|
|
|
|
|
config GENERATE_ACPI_TABLES
|
2009-10-15 15:35:47 +02:00
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default HAVE_ACPI_TABLES
|
2009-10-15 15:35:47 +02:00
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config GENERATE_MP_TABLE
|
|
|
|
|
bool
|
|
|
|
|
default HAVE_MP_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config GENERATE_PIRQ_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
bool
|
2009-10-26 16:14:07 +01:00
|
|
|
default HAVE_PIRQ_TABLE
|
|
|
|
|
|
|
|
|
|
menu "System tables"
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config WRITE_HIGH_TABLES
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Write 'high' tables to avoid being overwritten in F segment"
|
|
|
|
|
default y
|
|
|
|
|
|
|
|
|
|
config MULTIBOOT
|
2009-10-07 18:15:40 +02:00
|
|
|
bool "Generate Multiboot tables (for GRUB2)"
|
2009-11-09 18:56:47 +01:00
|
|
|
default y
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_ACPI_TABLES
|
|
|
|
|
depends on HAVE_ACPI_TABLES
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate ACPI tables"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate ACPI tables for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_MP_TABLE
|
|
|
|
|
depends on HAVE_MP_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate an MP table"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate an MP table (conforming to the Intel MultiProcessor
|
|
|
|
|
specification 1.4) for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
2009-10-15 15:35:47 +02:00
|
|
|
config GENERATE_PIRQ_TABLE
|
|
|
|
|
depends on HAVE_PIRQ_TABLE
|
2009-09-22 20:49:08 +02:00
|
|
|
bool "Generate a PIRQ table"
|
2009-10-15 15:35:47 +02:00
|
|
|
default y
|
2009-10-15 19:49:07 +02:00
|
|
|
help
|
|
|
|
|
Generate a PIRQ table for this board.
|
|
|
|
|
|
|
|
|
|
If unsure, say Y.
|
2009-09-22 20:49:08 +02:00
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
menu "Payload"
|
|
|
|
|
|
|
|
|
|
choice
|
2009-10-07 18:15:40 +02:00
|
|
|
prompt "Add a payload"
|
2009-08-12 17:00:51 +02:00
|
|
|
default PAYLOAD_NONE
|
|
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
config PAYLOAD_NONE
|
|
|
|
|
bool "None"
|
|
|
|
|
help
|
|
|
|
|
Select this option if you want to create an "empty" coreboot
|
|
|
|
|
ROM image for a certain mainboard, i.e. a coreboot ROM image
|
|
|
|
|
which does not yet contain a payload.
|
|
|
|
|
|
|
|
|
|
For such an image to be useful, you have to use 'cbfstool'
|
|
|
|
|
to add a payload to the ROM image later.
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
config PAYLOAD_ELF
|
2009-10-07 18:15:40 +02:00
|
|
|
bool "An ELF executable payload"
|
2009-08-12 17:00:51 +02:00
|
|
|
help
|
|
|
|
|
Select this option if you have a payload image (an ELF file)
|
|
|
|
|
which coreboot should run as soon as the basic hardware
|
|
|
|
|
initialization is completed.
|
|
|
|
|
|
|
|
|
|
You will be able to specify the location and file name of the
|
|
|
|
|
payload image later.
|
|
|
|
|
|
|
|
|
|
endchoice
|
|
|
|
|
|
|
|
|
|
config FALLBACK_PAYLOAD_FILE
|
2009-08-17 16:47:32 +02:00
|
|
|
string "Payload path and filename"
|
2009-08-12 17:00:51 +02:00
|
|
|
depends on PAYLOAD_ELF
|
|
|
|
|
default "payload.elf"
|
|
|
|
|
help
|
2009-08-25 02:53:22 +02:00
|
|
|
The path and filename of the ELF executable file to use as payload.
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
# TODO: Defined if no payload? Breaks build?
|
|
|
|
|
config COMPRESSED_PAYLOAD_LZMA
|
|
|
|
|
bool "Use LZMA compression for payloads"
|
|
|
|
|
default y
|
|
|
|
|
depends on PAYLOAD_ELF
|
|
|
|
|
help
|
|
|
|
|
In order to reduce the size payloads take up in the ROM chip
|
|
|
|
|
coreboot can compress them using the LZMA algorithm.
|
|
|
|
|
|
2009-10-16 21:12:49 +02:00
|
|
|
config COMPRESSED_PAYLOAD_NRV2B
|
2009-10-17 05:00:04 +02:00
|
|
|
bool
|
2009-10-16 21:12:49 +02:00
|
|
|
default n
|
|
|
|
|
|
2009-09-17 18:21:31 +02:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
menu "VGA BIOS"
|
|
|
|
|
|
|
|
|
|
config VGA_BIOS
|
|
|
|
|
bool "Add a VGA BIOS image"
|
|
|
|
|
help
|
|
|
|
|
Select this option if you have a VGA BIOS image that you would
|
|
|
|
|
like to add to your ROM.
|
|
|
|
|
|
|
|
|
|
You will be able to specify the location and file name of the
|
|
|
|
|
image later.
|
|
|
|
|
|
2009-08-17 16:46:13 +02:00
|
|
|
config FALLBACK_VGA_BIOS_FILE
|
|
|
|
|
string "VGA BIOS path and filename"
|
|
|
|
|
depends on VGA_BIOS
|
|
|
|
|
default "vgabios.bin"
|
|
|
|
|
help
|
|
|
|
|
The path and filename of the file to use as VGA BIOS.
|
|
|
|
|
|
|
|
|
|
config FALLBACK_VGA_BIOS_ID
|
2009-10-30 13:56:59 +01:00
|
|
|
string "VGA device PCI IDs"
|
2009-08-17 16:46:13 +02:00
|
|
|
depends on VGA_BIOS
|
|
|
|
|
default "1106,3230"
|
|
|
|
|
help
|
2009-10-07 18:15:40 +02:00
|
|
|
The comma-separated PCI vendor and device ID that would associate
|
|
|
|
|
your VGA BIOS to your video card.
|
|
|
|
|
|
|
|
|
|
Example: 1106,3230
|
|
|
|
|
|
|
|
|
|
In the above example 1106 is the PCI vendor ID (in hex, but without
|
|
|
|
|
the "0x" prefix) and 3230 specifies the PCI device ID of the
|
|
|
|
|
video card (also in hex, without "0x" prefix).
|
2009-08-17 16:46:13 +02:00
|
|
|
|
2010-03-01 09:34:19 +01:00
|
|
|
config INTEL_MBI
|
|
|
|
|
bool "Add an MBI image"
|
|
|
|
|
depends on NORTHBRIDGE_INTEL_I82830
|
|
|
|
|
help
|
|
|
|
|
Select this option if you have an Intel MBI image that you would
|
|
|
|
|
like to add to your ROM.
|
|
|
|
|
|
|
|
|
|
You will be able to specify the location and file name of the
|
|
|
|
|
image later.
|
|
|
|
|
|
|
|
|
|
config FALLBACK_MBI_FILE
|
|
|
|
|
string "Intel MBI path and filename"
|
|
|
|
|
depends on INTEL_MBI
|
|
|
|
|
default "mbi.bin"
|
|
|
|
|
help
|
|
|
|
|
The path and filename of the file to use as VGA BIOS.
|
|
|
|
|
|
|
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
menu "Bootsplash"
|
|
|
|
|
depends on PCI_OPTION_ROM_RUN_YABEL
|
|
|
|
|
|
|
|
|
|
config BOOTSPLASH
|
|
|
|
|
prompt "Show graphical bootsplash"
|
|
|
|
|
bool
|
|
|
|
|
depends on PCI_OPTION_ROM_RUN_YABEL
|
|
|
|
|
help
|
|
|
|
|
This option shows a graphical bootsplash screen. The grapics are
|
|
|
|
|
loaded from the CBFS file bootsplash.jpg.
|
|
|
|
|
|
|
|
|
|
config FALLBACK_BOOTSPLASH_FILE
|
|
|
|
|
string "Bootsplash path and filename"
|
|
|
|
|
depends on BOOTSPLASH
|
|
|
|
|
default "bootsplash.jpg"
|
|
|
|
|
help
|
2010-04-27 08:56:47 +02:00
|
|
|
The path and filename of the file to use as graphical bootsplash
|
|
|
|
|
screen. The file format has to be jpg.
|
2010-03-01 09:34:19 +01:00
|
|
|
|
|
|
|
|
# TODO: Turn this into a "choice".
|
|
|
|
|
config FRAMEBUFFER_VESA_MODE
|
|
|
|
|
prompt "VESA framebuffer video mode"
|
|
|
|
|
hex
|
|
|
|
|
default 0x117
|
|
|
|
|
depends on BOOTSPLASH
|
|
|
|
|
help
|
|
|
|
|
This option sets the resolution used for the coreboot framebuffer and
|
|
|
|
|
bootsplash screen. Set to 0x117 for 1024x768x16. A diligent soul will
|
|
|
|
|
some day make this a "choice".
|
|
|
|
|
|
|
|
|
|
config COREBOOT_KEEP_FRAMEBUFFER
|
|
|
|
|
prompt "Keep VESA framebuffer"
|
|
|
|
|
bool
|
|
|
|
|
depends on BOOTSPLASH
|
|
|
|
|
help
|
|
|
|
|
This option keeps the framebuffer mode set after coreboot finishes
|
|
|
|
|
execution. If this option is enabled, coreboot will pass a
|
|
|
|
|
framebuffer entry in its coreboot table and the payload will need a
|
|
|
|
|
framebuffer driver. If this option is disabled, coreboot will switch
|
|
|
|
|
back to text mode before handing control to a payload.
|
|
|
|
|
|
2009-08-12 17:00:51 +02:00
|
|
|
endmenu
|
|
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
menu "Debugging"
|
|
|
|
|
|
|
|
|
|
# TODO: Better help text and detailed instructions.
|
2009-08-12 17:00:51 +02:00
|
|
|
config GDB_STUB
|
2009-08-25 02:53:22 +02:00
|
|
|
bool "GDB debugging support"
|
2009-08-12 17:00:51 +02:00
|
|
|
default y
|
|
|
|
|
help
|
2009-08-25 02:53:22 +02:00
|
|
|
If enabled, you will be able to set breakpoints for gdb debugging.
|
|
|
|
|
See src/arch/i386/lib/c_start.S for details.
|
2009-08-12 17:00:51 +02:00
|
|
|
|
2010-08-26 14:46:02 +02:00
|
|
|
config HAVE_DEBUG_RAM_SETUP
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config DEBUG_RAM_SETUP
|
|
|
|
|
bool "Output verbose RAM init debug messages"
|
|
|
|
|
default n
|
2010-08-26 14:46:02 +02:00
|
|
|
depends on HAVE_DEBUG_RAM_SETUP
|
2010-03-05 11:03:50 +01:00
|
|
|
help
|
|
|
|
|
This option enables additional RAM init related debug messages.
|
|
|
|
|
It is recommended to enable this when debugging issues on your
|
|
|
|
|
board which might be RAM init related.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-10-01 16:50:12 +02:00
|
|
|
config HAVE_DEBUG_CAR
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-11-10 01:14:32 +01:00
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
2010-10-01 16:50:12 +02:00
|
|
|
config DEBUG_CAR
|
|
|
|
|
bool "Output verbose Cache-as-RAM debug messages"
|
|
|
|
|
default n
|
2010-11-10 01:14:32 +01:00
|
|
|
depends on HAVE_DEBUG_CAR && \
|
|
|
|
|
(DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8)
|
2010-10-01 16:50:12 +02:00
|
|
|
help
|
|
|
|
|
This option enables additional CAR related debug messages.
|
|
|
|
|
|
2010-06-01 21:25:31 +02:00
|
|
|
config DEBUG_PIRQ
|
|
|
|
|
bool "Check PIRQ table consistency"
|
|
|
|
|
default n
|
|
|
|
|
depends on GENERATE_PIRQ_TABLE
|
|
|
|
|
help
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-08-26 14:46:02 +02:00
|
|
|
config HAVE_DEBUG_SMBUS
|
|
|
|
|
def_bool n
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config DEBUG_SMBUS
|
|
|
|
|
bool "Output verbose SMBus debug messages"
|
|
|
|
|
default n
|
2010-08-26 14:46:02 +02:00
|
|
|
depends on HAVE_DEBUG_SMBUS
|
2010-03-05 11:03:50 +01:00
|
|
|
help
|
|
|
|
|
This option enables additional SMBus (and SPD) debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config DEBUG_SMI
|
|
|
|
|
bool "Output verbose SMI debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on HAVE_SMI_HANDLER
|
|
|
|
|
help
|
|
|
|
|
This option enables additional SMI related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-08-01 17:41:14 +02:00
|
|
|
config DEBUG_SMM_RELOCATION
|
|
|
|
|
bool "Debug SMM relocation code"
|
|
|
|
|
default n
|
|
|
|
|
depends on HAVE_SMI_HANDLER
|
|
|
|
|
help
|
|
|
|
|
This option enables additional SMM handler relocation related
|
|
|
|
|
debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-11-10 01:14:32 +01:00
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
|
|
|
|
config DEBUG_MALLOC
|
|
|
|
|
bool "Output verbose malloc debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
|
|
|
|
|
help
|
|
|
|
|
This option enables additional malloc related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
|
|
|
|
|
# printk(BIOS_DEBUG, ...) calls.
|
2010-09-08 00:30:15 +02:00
|
|
|
config REALMODE_DEBUG
|
|
|
|
|
bool "Enable debug messages for option ROM execution"
|
|
|
|
|
default n
|
2010-11-10 01:14:32 +01:00
|
|
|
depends on PCI_OPTION_ROM_RUN_REALMODE && \
|
|
|
|
|
(DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8)
|
2010-09-08 00:30:15 +02:00
|
|
|
help
|
|
|
|
|
This option enables additional x86emu related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the time to emulate a ROM.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
config X86EMU_DEBUG
|
|
|
|
|
bool "Output verbose x86emu debug messages"
|
|
|
|
|
default n
|
|
|
|
|
depends on PCI_OPTION_ROM_RUN_YABEL
|
|
|
|
|
help
|
|
|
|
|
This option enables additional x86emu related debug messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_JMP
|
|
|
|
|
bool "Trace JMP/RETF"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print information about JMP and RETF opcodes from x86emu.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_TRACE
|
|
|
|
|
bool "Trace all opcodes"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print _all_ opcodes that are executed by x86emu.
|
2010-04-27 08:56:47 +02:00
|
|
|
|
2010-03-05 11:03:50 +01:00
|
|
|
WARNING: This will produce a LOT of output and take a long time.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_PNP
|
|
|
|
|
bool "Log Plug&Play accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print Plug And Play accesses made by option ROMs.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_DISK
|
|
|
|
|
bool "Log Disk I/O"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print Disk I/O related messages.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_PMM
|
|
|
|
|
bool "Log PMM"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to POST Memory Manager (PMM).
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_VBE
|
|
|
|
|
bool "Debug VESA BIOS Extensions"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to VESA BIOS Extension (VBE) functions.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_INT10
|
|
|
|
|
bool "Redirect INT10 output to console"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Let INT10 (i.e. character output) calls print messages to debug output.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_INTERRUPTS
|
|
|
|
|
bool "Log intXX calls"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to interrupt handling.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_CHECK_VMEM_ACCESS
|
|
|
|
|
bool "Log special memory accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print messages related to accesses to certain areas of the virtual
|
|
|
|
|
memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_MEM
|
|
|
|
|
bool "Log all memory accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print memory accesses made by option ROM.
|
|
|
|
|
Note: This also includes accesses to fetch instructions.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
|
|
|
|
config X86EMU_DEBUG_IO
|
|
|
|
|
bool "Log IO accesses"
|
|
|
|
|
default n
|
|
|
|
|
depends on X86EMU_DEBUG
|
|
|
|
|
help
|
|
|
|
|
Print I/O accesses made by option ROM.
|
|
|
|
|
|
|
|
|
|
Note: This option will increase the size of the coreboot image.
|
|
|
|
|
|
|
|
|
|
If unsure, say N.
|
|
|
|
|
|
2010-03-13 23:07:15 +01:00
|
|
|
config LLSHELL
|
|
|
|
|
bool "Built-in low-level shell"
|
|
|
|
|
default n
|
|
|
|
|
help
|
|
|
|
|
If enabled, you will have a low level shell to examine your machine.
|
|
|
|
|
Put llshell() in your (romstage) code to start the shell.
|
|
|
|
|
See src/arch/i386/llshell/llshell.inc for details.
|
|
|
|
|
|
2009-10-07 18:15:40 +02:00
|
|
|
endmenu
|
|
|
|
|
|
2009-10-20 18:10:04 +02:00
|
|
|
config LIFT_BSP_APIC_ID
|
|
|
|
|
bool
|
|
|
|
|
default n
|
2009-10-26 16:14:07 +01:00
|
|
|
|
|
|
|
|
# These probably belong somewhere else, but they are needed somewhere.
|
|
|
|
|
config AP_CODE_IN_CAR
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2010-10-08 01:02:06 +02:00
|
|
|
config RAMINIT_SYSINFO
|
|
|
|
|
bool
|
|
|
|
|
default n
|
|
|
|
|
|
2009-10-26 16:14:07 +01:00
|
|
|
config ENABLE_APIC_EXT_ID
|
|
|
|
|
bool
|
|
|
|
|
default n
|
2009-11-12 17:38:03 +01:00
|
|
|
|
|
|
|
|
config WARNINGS_ARE_ERRORS
|
|
|
|
|
bool
|
2010-07-08 18:41:05 +02:00
|
|
|
default y
|
2009-11-27 17:55:13 +01:00
|
|
|
|
|
|
|
|
config ID_SECTION_OFFSET
|
|
|
|
|
hex
|
|
|
|
|
default 0x10
|
2010-03-14 22:31:05 +01:00
|
|
|
|
2010-10-13 08:23:02 +02:00
|
|
|
# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
|
|
|
|
|
# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
|
|
|
|
|
# mutually exclusive. One of these options must be selected in the
|
|
|
|
|
# mainboard Kconfig if the chipset supports enabling and disabling of
|
|
|
|
|
# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
|
|
|
|
|
# in mainboard/Kconfig to know if the button should be enabled or not.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_DEFAULT_ENABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board has a power button which can optionally be
|
|
|
|
|
disabled by the user.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_DEFAULT_DISABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board has a power button which can optionally be
|
|
|
|
|
enabled by the user, e.g. when the board ships with a jumper over
|
|
|
|
|
the power switch contacts.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_FORCE_ENABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board requires that the power button is always
|
|
|
|
|
enabled.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_FORCE_DISABLE
|
|
|
|
|
def_bool n
|
|
|
|
|
help
|
|
|
|
|
Select when the board requires that the power button is always
|
|
|
|
|
disabled, e.g. when it has been hardwired to ground.
|
|
|
|
|
|
|
|
|
|
config POWER_BUTTON_IS_OPTIONAL
|
|
|
|
|
bool
|
|
|
|
|
default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
|
|
|
|
|
default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
|
|
|
|
|
help
|
|
|
|
|
Internal option that controls ENABLE_POWER_BUTTON visibility.
|
|
|
|
|
|
2010-03-14 22:31:05 +01:00
|
|
|
source src/Kconfig.deprecated_options
|