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Samsung CPUs: Unify Kconfig For all other CPUs, we unconditionally include the CPU Kconfig files in the CPU directory, not in the vendor directory. Do the same thing for the Exynos CPUs. This allows us to make CPU dependent changes in the directory of that CPU alone. Also, drop some unused Kconfig variables from the Exynos Kconfig files. Change-Id: I4e4c22a0693988834e619dd33d121bf994ed57e8 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-19 21:02:47 +02:00
config CPU_SAMSUNG_EXYNOS5250
Move ARCH_* from board/Kconfig to cpu or soc Kconfig. CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5570 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-04-23 00:16:54 +02:00
select ARCH_ARMV7
Samsung CPUs: Unify Kconfig For all other CPUs, we unconditionally include the CPU Kconfig files in the CPU directory, not in the vendor directory. Do the same thing for the Exynos CPUs. This allows us to make CPU dependent changes in the directory of that CPU alone. Also, drop some unused Kconfig variables from the Exynos Kconfig files. Change-Id: I4e4c22a0693988834e619dd33d121bf994ed57e8 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-19 21:02:47 +02:00
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
Exynos 5250: Enable dynamic CBMEM ... In order to do this, the graphics memory has to move into the resource allocator and out of CBMEM. Change-Id: I7396da4a7068404b0d2e4d308becab4dd6ea59bb Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/59326 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4390 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-06-20 00:54:19 +02:00
select DYNAMIC_CBMEM
Samsung CPUs: Unify Kconfig For all other CPUs, we unconditionally include the CPU Kconfig files in the CPU directory, not in the vendor directory. Do the same thing for the Exynos CPUs. This allows us to make CPU dependent changes in the directory of that CPU alone. Also, drop some unused Kconfig variables from the Exynos Kconfig files. Change-Id: I4e4c22a0693988834e619dd33d121bf994ed57e8 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-19 21:02:47 +02:00
bool
default n
if CPU_SAMSUNG_EXYNOS5250
bootblock_cpu_init() stub for exynos5250 This adds a stub for bootblock_cpu_init() for exynos5250. It will eventually contain code to copy ROM content from SPI to SRAM. Change-Id: I26ee62a1e701013f38f76f200579faa680530860 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2138 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-11 20:34:06 +01:00
config BOOTBLOCK_CPU_INIT
string
default "cpu/samsung/exynos5250/bootblock.c"
help
CPU/SoC-specific bootblock code. This is useful if the
bootblock must load microcode or copy data from ROM before
searching for the bootblock.
armv7: Reserve space BL1 and checksum header by specifying bootblock offset. Not all ARM systems need "BL1", and the layout of BL* and bootblock may be different (ex, Exynos 5250 may use a new BL1 with variable length checksum header). To support that better, define the real base address (and ROM offset) of boot block, and then we can post-processing ROM image file by filling data / checksum and any other information. Change-Id: I0e3105e52500b6b457371ad33a9aa546acf28928 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3664 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-12 06:55:58 +02:00
# ROM image layout.
#
# 0x0000: vendor-provided BL1 (8k).
# 0x2000: bootblock
# 0x2010-0x2090: reserved for CBFS master header.
# 0xA000: Free for CBFS data.
config BOOTBLOCK_ROM_OFFSET
hex
default 0x2000
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x2010
config CBFS_ROM_OFFSET
# Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size.
hex "offset of CBFS data in ROM"
default 0x0A000
armv7/snow: add BL1_SIZE_KB and get rid of magic constants This adds a BL1_SIZE_KB config variable so that we can get rid of some magic constants. Change-Id: I9dbcfb407d3f8e367be5d943e95b032ce88b0ad0 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2332 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-09 04:10:33 +01:00
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
# Example SRAM/iRAM map for Exynos5250 platform:
#
# 0x0202_0000: vendor-provided BL1
# 0x0202_3400: bootblock, assume up to 32KB in size
# 0x0203_0000: romstage, assume up to 128KB in size.
armv7/exynos5250: fix usage of _stack and _estack This patch fixes up the usage of stack pointer and regions. The current approach only works by coincidence, so this fixes a few things at once to get it into a working state and allow us to use checkstack() again: - Add a STACK_SIZE Kconfig variable. Earlier on it was evaluated to 0. - Assign _stack and _estack using CPU-specific Kconfig variables since it may reside elsewhere in memory (not necessarily DRAM). - Make the existing IRAM stack variables more useful in this context. Change-Id: I4ca5b5680c9ea7e26b1b2b6b3890e028188b51c2 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2416 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-02-15 01:41:54 +01:00
# 0x0207_8000: stack pointer
WIP: Initial support for Samsung Exynos 5250 ARM CPU Samsung SoC files, including Exynos5 (a Cortex-A15 implementation). Since this is an SoC we'll forego the x86-style {north,south}bridge and cpu distinction. We may try to split some stuff out before the final version if prudent. Change-Id: Ie068e9dc3dd836c83d90e282b10d5202e7a4ba9b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2005 Tested-by: build bot (Jenkins)
2012-12-08 02:18:43 +01:00
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
config BOOTBLOCK_BASE
WIP: Initial support for Samsung Exynos 5250 ARM CPU Samsung SoC files, including Exynos5 (a Cortex-A15 implementation). Since this is an SoC we'll forego the x86-style {north,south}bridge and cpu distinction. We may try to split some stuff out before the final version if prudent. Change-Id: Ie068e9dc3dd836c83d90e282b10d5202e7a4ba9b Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2005 Tested-by: build bot (Jenkins)
2012-12-08 02:18:43 +01:00
hex
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
default 0x02023400
config ROMSTAGE_BASE
move iRAM config variable to exynos5250 Kconfig Since these don't seem very generic and depend on the BL1, let's move them to the CPU-specific Kconfig. Change-Id: I33059b7db30d35a1853918a580f312e50a3499fa Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2077 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-27 22:50:32 +01:00
hex
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
default 0x02030000
move iRAM config variable to exynos5250 Kconfig Since these don't seem very generic and depend on the BL1, let's move them to the CPU-specific Kconfig. Change-Id: I33059b7db30d35a1853918a580f312e50a3499fa Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2077 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-27 22:50:32 +01:00
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
config ROMSTAGE_SIZE
move iRAM config variable to exynos5250 Kconfig Since these don't seem very generic and depend on the BL1, let's move them to the CPU-specific Kconfig. Change-Id: I33059b7db30d35a1853918a580f312e50a3499fa Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2077 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-27 22:50:32 +01:00
hex
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
default 0x10000
move iRAM config variable to exynos5250 Kconfig Since these don't seem very generic and depend on the BL1, let's move them to the CPU-specific Kconfig. Change-Id: I33059b7db30d35a1853918a580f312e50a3499fa Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2077 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-27 22:50:32 +01:00
armv7/exynos5250: fix usage of _stack and _estack This patch fixes up the usage of stack pointer and regions. The current approach only works by coincidence, so this fixes a few things at once to get it into a working state and allow us to use checkstack() again: - Add a STACK_SIZE Kconfig variable. Earlier on it was evaluated to 0. - Assign _stack and _estack using CPU-specific Kconfig variables since it may reside elsewhere in memory (not necessarily DRAM). - Make the existing IRAM stack variables more useful in this context. Change-Id: I4ca5b5680c9ea7e26b1b2b6b3890e028188b51c2 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2416 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-02-15 01:41:54 +01:00
# Stack may reside in either IRAM or DRAM. We will define it to live
# at the top of IRAM for now.
#
# Stack grows downward, push operation stores register contents in
# consecutive memory locations ending just below SP
config STACK_TOP
hex
default 0x02078000
config STACK_BOTTOM
hex
default 0x02077000
config STACK_SIZE
hex
default 0x1000
Extend CBFS to support arbitrary ROM source media. Summary: Isolate CBFS underlying I/O to board/arch-specific implementations as "media stream", to allow loading and booting romstage on non-x86. CBFS functions now all take a new "media source" parameter; use CBFS_DEFAULT_MEDIA if you simply want to load from main firmware. API Changes: cbfs_find => cbfs_get_file. cbfs_find_file => cbfs_get_file_content. cbfs_get_file => cbfs_get_file_content with correct type. CBFS used to work only on memory-mapped ROM (all x86). For platforms like ARM, the ROM may come from USB, UART, or SPI -- any serial devices and not available for memory mapping. To support these devices (and allowing CBFS to read from multiple source at the same time), CBFS operations are now virtual-ized into "cbfs_media". To simplify porting existing code, every media source must support both "reading into pre-allocated memory (read)" and "read and return an allocated buffer (map)". For devices without native memory-mapped ROM, "cbfs_simple_buffer*" provides simple memory mapping simulation. Every CBFS function now takes a cbfs_media* as parameter. CBFS_DEFAULT_MEDIA is defined for CBFS functions to automatically initialize a per-board default media (CBFS will internally calls init_default_cbfs_media). Also revised CBFS function names relying on memory mapped backend (ex, "cbfs_find" => actually loads files). Now we only have two getters: struct cbfs_file *entry = cbfs_get_file(media, name); void *data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, name, type); Test results: - Verified to work on x86/qemu. - Compiles on ARM, and follow up commit will provide working SPI driver. Change-Id: Iac911ded25a6f2feffbf3101a81364625bb07746 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2182 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-22 11:57:56 +01:00
# TODO We may probably move this to board-specific implementation files instead
# of KConfig values.
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x02060000
config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x000017000
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
config SYS_SDRAM_BASE
armv7: Don't let users set ram parameters that are fixed in hardware. The SDRAM base is fixed in hardware. It makes no sense to make it configurable. The TEXT start is a magic number that should also be fixed, not settable. Change-Id: Ie44cc5c8da1dc38fc00eb602c4a295b045ca5364 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2465 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-20 22:24:35 +01:00
hex
armv7/snow: get to romstage This patch does a few things to get us into romstage: - Add romstage as a stage (a later patch adds it as a binary, which is probably wrong). The Makefile magic is complex enough that we let it build the XIP file for now, but we no longer use it. - Replace findstage with loadstage. Loadstage will find a stage, load the code to memory, and zero the remaining part of memory. Now we can link the romstage to go anywhere! - Eliminate magic offsets from code/ldscripts and centralize Kconfig variables in src/cpu/samsung/exynos5250/Kconfig. - Tidy up code and serial output Change-Id: Iae4d2f9e7f429cb1df15d49daf9a08b88d75d79d Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2174 Tested-by: build bot (Jenkins)
2013-01-18 05:52:21 +01:00
default 0x40000000
Samsung CPUs: Unify Kconfig For all other CPUs, we unconditionally include the CPU Kconfig files in the CPU directory, not in the vendor directory. Do the same thing for the Exynos CPUs. This allows us to make CPU dependent changes in the directory of that CPU alone. Also, drop some unused Kconfig variables from the Exynos Kconfig files. Change-Id: I4e4c22a0693988834e619dd33d121bf994ed57e8 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3683 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-19 21:02:47 +02:00
endif
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