Commit Graph

268 Commits

Author SHA1 Message Date
Stefan Reinauer c13093b148 simplify source tree hierarchy: move files from sdram/ and ram/ to lib/
It's only three files. Also fix up all the paths (Gotta love included C files)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-09-23 18:51:03 +00:00
Uwe Hermann 84a0f54b3b Add kconfig support for all Intel 82810 (i810) boards.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-28 16:38:42 +00:00
Uwe Hermann bca3b92df2 Add kconfig support for all missing Intel 440BX based boards.
This includes:

soyo/sy-6ba-plus-iii
a-trend/atc-6240
a-trend/atc-6220
gigabyte/ga-6bxc
biostar/m6tba
azza/pt-6ibd
tyan/s1846
abit/be6-ii_v2_0
compaq/deskpro_en_sff_p600msi/ms6119
msi/ms6147
asus/p2b
asus/p2b-d
asus/p2b-ds
asus/p3b-f

The Makefile.inc for all of them are _exactly_ the same, so I made a common
src/mainboard/Makefile.romccboard.inc (maybe needs a nicer name). I also suspect
that many other romcc-based boards will be able to re-use this Makefile.inc.

Apart from the board name, most boards only differ in the Super I/O that's
being used and the IRQ_SLOT_COUNT value. The Tyan S1846 is a bit different
as it doesn't have an irq_tables.c.

I also dropped the broken MS-6178 kconfig stuff for now, I'll submit a
proper config in another patch.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-26 17:10:00 +00:00
Uwe Hermann 20a1ae8840 Replace PIRQ_TABLE with HAVE_PIRQ_TABLE, the former doesn't exist.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4576 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 14:51:25 +00:00
Uwe Hermann 5ec2c2b998 Various Kconfig and Makefile.inc fixes and cosmetics.
- Whitespace fixes, remove trailing whitespace, use TABs for identation
   (except in Kconfig "help" lines, which start with one TAB and two spaces
   as per Linux kernel style)

 - Kconfig: Standardize on 'bool' (not 'boolean').

 - s/lar/cbfs/ in one Kconfig help string.

 - Reword various Kconfig menu entries for a more usable and consistent menu.

 - Fix incorrect comment of NO_RUN in devices/Kconfig.

 - superio/serverengines/Kconfig: Incorrect config name.

 - superio/Makefile.inc: s/serverengine/serverengines/.

 - superio/intel/Kconfig: s/SUPERIO_FINTEK_I3100/SUPERIO_INTEL_I3100/.

 - mainboard/via/vt8454c/Kconfig: Fix copy-paste error in help string.

 - mainboard/via/epia-n/Kconfig: Fix "bool" menu text.

 - console/Kconfig: Don't mention defaults in the menu string, kconfig
   already displays them anyway.

 - Kill "Drivers" menu for now, it only confuses users as long as it's emtpy.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-25 00:53:22 +00:00
Patrick Georgi 7467664c09 Reduce size of the romstage on various boards that fail to build on QA.
This eliminates 56kb of padding in the bootblock.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-19 13:40:20 +00:00
Patrick Georgi 0588d19abe Kconfig!
Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-12 15:00:51 +00:00
Patrick Georgi b339e10f04 Enable CBFS everywhere. All boards compiled for me (abuild tested),
and we will fix issues as they appear.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-08-11 17:35:02 +00:00
Uwe Hermann fc6de69078 Fix MS-6178 boot by setting unused device (CIR) to 'off' (trivial).
Tested on hardware, works fine.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-11 22:00:37 +00:00
Uwe Hermann 328bccc610 Enable onboard VGA on the MS-6178 (i810 chipset) board (trivial).
Tested on hardware with the patch from r4398 and works fine as soon
as Linux boots (no VGA in FILO for some reason, will investigate).

In order to make the 'i810.vga' VGA blob from the vendor BIOS work
you have to make the check for PCI device ID mismatches non-fatal
(for now) in the src/devices/pci_rom.c file like this:

Index: src/devices/pci_rom.c
===================================================================
--- src/devices/pci_rom.c       (Revision 4393)
+++ src/devices/pci_rom.c       (Arbeitskopie)
@@ -87,7 +87,7 @@
        if (dev->vendor != rom_data->vendor || dev->device != rom_data->device) {
                printk_err("Device or Vendor ID mismatch Vendor %04x, Device %04x\n",
                           rom_data->vendor, rom_data->device);
-               return NULL;
+               // return NULL;
        }

        printk_spew("PCI ROM Image,  Class Code %04x%02x, Code Type %02x\n",

The reason is that the VGA blob thinks the proper VGA device ID is 0x7123
whereas it really is 0x7121 on hardware. There are multiple ways to work
around this (there have been many discussions in the past), we'll see which
method will be used in future...

Note: This has been tested against r4393 only for now to make sure there
are no problems because of the recent resource allocator changes, see
http://www.coreboot.org/pipermail/coreboot/2009-July/050486.html.
Tests with trunk will follow.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-07-05 16:01:57 +00:00
Stefan Reinauer 9dd27bc03a the tool chain settings should not be in renamed (as they will never live in
Kconfig)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 17:13:58 +00:00
Stefan Reinauer 0867062412 This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30 15:17:49 +00:00
Myles Watson f17f647a62 Undo my ugly commit that added uses clauses in lots of places instead of one.
Fix configuration of all boards. (Abuild tested)
Hopefully fix compilation of PPC boards (they've never compiled for me.)

Apologize profusely.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19 21:18:14 +00:00
Uwe Hermann 6114311c8e Convert the MSI MS-6178 board to CBFS.
Also, enable HIGH_TABLES support for this board.

The HIGH_TABLES failed with:

  No matching ram area found for range:
    [0x00000000000f0000, 0x0000000000100000)
  Ram areas
    [0x0000000000000000, 0x0000000000001000) Reserved
    [0x0000000000001000, 0x00000000000a0000) RAM
    [0x0000000000100000, 0x000000000fff0000) RAM
    [0x000000000fff0000, 0x0000000010000000) Reserved
  SELFBOOT RETURNED!
  Boot failed.

The fix was to change northbridge.c as follows:

  - ram_resource(dev, idx++, 1024, tolmk - 1024);
  + ram_resource(dev, idx++, 768, tolmk - 768);

This is build-tested and tested on hardware by me. It boots fine,
for instace with SeaBIOS and the standard GRUB1 from my disk.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19 15:41:49 +00:00
Myles Watson 82bc9bc31e Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial.
Abuild tested with -C.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-17 16:38:43 +00:00
Carl-Daniel Hailfinger cff071ab0e When I started refactoring mainboard Config.lb, I added two different
files for targets without failover:
src/config/nofailovercalculation.lb (64 kB XIP)
src/config/nofailovercalculation128.lb (128 kB XIP)
Targets with other XIP sizes were ignored.

This patch moves XIP size back into mainboard code.

Benefits from this patch:
- src/config/nofailovercalculation128.lb is no longer needed
- Targets with XIP sizes besides 64k and 128k benefit from refactoring
- Conceptually, this makes the include files pure calculation files
without settings.

Abuild tested.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06 16:50:38 +00:00
Luc Verhaegen a9c5ea08d0 Revert "CMOS: Add set_option and rework get_option."
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660.

Stepan pointed out that "s" means string, which makes the following statement
in this commit message invalid: "Since we either have reserved space (which
we shouldn't do anything with in these two functions), an enum or a
hexadecimal value, unsigned int seemed like the way to go."

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Luc Verhaegen <libv@skynet.be>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03 14:19:33 +00:00
Luc Verhaegen 9ceae905f1 CMOS: Add set_option and rework get_option.
To ease some of my debugging pain on the unichrome, i decided i needed to
move FB size selection into cmos, so i could test a size and then reset it
to the default after loading this value so that the next reboot uses the
(working) default again. This meant implementing set_option in parallel to
get_option.

get_option was then found to have inversed argument ordering (like outb) and
passing char * and then depending on the cmos layout length, which made me
feel quite uncomfortable. Since we either have reserved space (which we
shouldn't do anything with in these two functions), an enum or a
hexadecimal value, unsigned int seemed like the way to go. So all users of
get_option now have their arguments inversed and switched from using ints
to unsigned ints now.

The way get_cmos_value was implemented forced us to not overlap byte and to
have multibyte values be byte aligned. This logic is now adapted to do a
full uint32_t read (when needed) at any offset and any length up to 32, and
the shifting all happens inside an uint32_t as well. set_cmos_value was
implemented similarly. Both routines have been extensively tested in a
quick separate little program as it is not easy to get this stuff right.

build_opt_tbl.c was altered to function correctly within these new
parameters. The enum value retrieval has been changed strol(..., NULL, 10)
to stroul(..., NULL, 0), so that we not only are able to use unsigned ints
now but so that we also interprete hex values correctly. The 32bit limit
gets imposed on all entries not marked reserved, an unused "user_data" field
that appeared in a lot of cmos.layouts has been changed to reserved as well.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03 10:47:19 +00:00
Joseph Smith 60f0f1b18f enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx southbridge.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29 13:45:22 +00:00
Stefan Reinauer 88e71e8859 Run dos2unix on all files:
find . -type f| grep -v svn | xargs dos2unix

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02 12:42:30 +00:00
Patrick Georgi 12aba82e55 Refactor copy_and_run so that it uses a single code base instead of
3 (with one of them way too much assembler code).

On the way, I had to make some changes to the way the code is built, 
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as 
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects 
lots of post-raminit code (memcpy doesn't really make sense before 
raminit, or at least CAR)

The coreboot_apc code (AMD boards) gained some .c includes because I 
don't know that part of the code enough to really rework it and only 
have limited possibilities to test it. The includes should give an 
identical situation for this part of the code.

This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30 07:07:22 +00:00
Stefan Reinauer 6f52d11e9e drop duplicate compiler options that are already mentioned in CFLAGS.
(scan-build chokes on this)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 18:16:20 +00:00
Stefan Reinauer afa5985433 no duplicate names in cmos.layout allowed. (fixes a bunch of boards)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 12:35:57 +00:00
Carl-Daniel Hailfinger b5e10bcf1f Thanks to Myles' patch adding support for include statements,
refactoring Config.lb became possible.

Factor out ROM size calculation from Config.lb.
  
This patch converts 87 boards (with and without USE_FAILOVER_IMAGE),
but it has to work around a parser bug. 

89 files changed, 209 insertions(+), 2415 deletions(-)
A total of 2206 removed lines.
  
Abuild works for all changed boards on khepri.

Myles writes:
I've tested serengeti for the failover portion and s2892 for the
nofailover portion.  ldoptions are exactly the same and they both boot
the same.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4147 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 00:16:06 +00:00
Peter Stuge 483b7bbd77 v2/src romfs->cbfs rename
This also has the config tool changes in v2/util.

Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14 07:40:01 +00:00
Rudolf Marek 743b635ca3 I need to do uses HAVE_ACPI_RESUME for each board. Here we go.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Rudolf Marek <r.marek@assembler.cz>

It should fix the build break introduced in r4101



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 20:07:26 +00:00
Carl-Daniel Hailfinger 6dcbe7f540 This patch cleans up the calls to $CC in mainboard Config.lb files. They
now all have the same parameter order.

action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS)
-I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S
$(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@"

The idea behind this parameter order is:
- *FLAGS at the beginning.
- Use a common set of *FLAGS.
- Include files and directories listed afterwards.
- nostdinc, nostdlib, no-builtin tell the compiler this is standalone
  code.
- Warnings. They do not influence source or compilation.
- Compilation strategy (small) and output mode (asm or binary).
- File to be compiled.
- Output name.
- $(DEBUG_CFLAGS) and -S are only used for asm output.


Other changes in this patch:

- src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of
hardcoding the respective flags.

- $DEBUG_CFLAGS was added to asm outputting $CC calls:
supermicro/h8dme/Config.lb
lippert/roadrunner-lx/Config.lb

- $DISTRO_CFLAGS was added to some $CC calls in:
iwill/dk8_htx/Config.lb (CAR AP code)
supermicro/h8dmr/Config.lb (CAR AP code)
supermicro/h8dme/Config.lb (CAR AP code)
gigabyte/m57sli/Config.lb (CAR AP code)
gigabyte/ga_2761gxdk/Config.lb (CAR AP code)
amd/serengeti_cheetah_fam10/Config.lb (everywhere)
msi/ms7135/Config.lb (everywhere)
nvidia/l1_2pvv/Config.lb (CAR AP code)
-$CFLAGS was added to all $CC calls in:
amd/db800/Config.lb
amd/dbm690t/Config.lb
amd/norwich/Config.lb
amd/pistachio/Config.lb
amd/serengeti_cheetah/Config.lb
amd/serengeti_cheetah_fam10/Config.lb
arima/hdama/Config.lb
artecgroup/dbe61/Config.lb
asus/a8n_e/Config.lb
asus/a8v-e_se/Config.lb
asus/m2v-mx_se/Config.lb
broadcom/blast/Config.lb
digitallogic/msm800sev/Config.lb
gigabyte/ga_2761gxdk/Config.lb
gigabyte/m57sli/Config.lb
ibm/e325/Config.lb
ibm/e326/Config.lb
iei/pcisa-lx-800-r10/Config.lb
iwill/dk8_htx/Config.lb
iwill/dk8s2/Config.lb
iwill/dk8x/Config.lb
kontron/986lcd-m/Config.lb
lippert/roadrunner-lx/Config.lb
lippert/spacerunner-lx/Config.lb
msi/ms7135/Config.lb
msi/ms7260/Config.lb
msi/ms9185/Config.lb
msi/ms9282/Config.lb
newisys/khepri/Config.lb
nvidia/l1_2pvv/Config.lb
pcengines/alix1c/Config.lb
sunw/ultra40/Config.lb
supermicro/h8dme/Config.lb
supermicro/h8dmr/Config.lb
technexion/tim8690/Config.lb
tyan/s2735/Config.lb
tyan/s2850/Config.lb
tyan/s2875/Config.lb
tyan/s2880/Config.lb
tyan/s2881/Config.lb
tyan/s2882/Config.lb
tyan/s2885/Config.lb
tyan/s2891/Config.lb
tyan/s2892/Config.lb
tyan/s2895/Config.lb
tyan/s2912/Config.lb
tyan/s2912_fam10/Config.lb
tyan/s4880/Config.lb
tyan/s4882/Config.lb

- Use $@ wherever appropriate.

- Kill that evil CACHE_AS_RAM_AUTO_C variable.

- Trailing whitespace fixups on lines which were touched anyway.

We now only have 6 remaining different calls to $CC whereas before there
were 20.
If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to
src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4
different calls.
If we can decide on the use of $CPU_OPT, we are down to 3 different
calls.

One additional point I'd like to clear up:
if ASSEMBLER_DEBUG
makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm
end

"-dA -fverbose-asm" is only useful for asm output. For these flags,
DEBUG_CFLAGS is a total misnomer. What about calling them
DEBUG_ASMCFLAGS or somesuch?
"-g" should be controllable by a separate switch. It is useful even for
object code.


The following targets are broken by this patch because they contain
implicit declarations, but the error did not trigger due to missing
CFLAGS:
amd/serengeti_cheetah
asus/a8v-e_se
asus/m2v-mx_se
digitallogic/msm800sev
pcengines/alix1c
supermicro/h8dme
supermicro/h8dmr


Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12 21:47:09 +00:00
Carl-Daniel Hailfinger ebdc7c7cfe Kill remaining unneeded CAR/ROMCC if-blocks.
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although
USE_DCACHE_RAM is always set for them. Such checks are not only
pointless, they actively make the files hard to read.

A full abuild run confirmed that compilation did not change with this
patch applied.

The patch does not change whitespace of the remaining code to ease
review and svn blame.

With this change, it should be possible to have two or three Config.lb
variants in total (except the actual hardware config). Right now, some
Config.lb have comments, some don't, some have empty lines for better
readability, some don't, some have leading whitespace, some don't. This
is an utter mess and unifying these files would certainly reduce the
headaches I have when looking at them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 14:51:49 +00:00
Carl-Daniel Hailfinger 7b6ea25f21 Fix up the incomplete commit in r4055.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:40:44 +00:00
Carl-Daniel Hailfinger f7116c3bd0 There are more than a dozen targets in the v2 tree which refer to ROMCC
in their Config.lb but never use it. There's no point in keeping
dead code around.

This patch removes ROMCC remainders from Config.lb and kills orphaned
auto.c and failover.c in the affected mainboard directories.

arima/hdama
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms9282
newisys/khepri
sunw/ultra40
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882

Abuild log is completely identical with and without the patch.

With this patch, the last ROMCC remainders for K8 boards are gone.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:29:35 +00:00
Stefan Reinauer 3081bdfa44 Drop CONFIG_CHIP_NAME. Those config statements in Config.lb should
be used unconditionally, and the names don't hurt.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-01 13:43:21 +00:00
Ronald G. Minnich d469cdab93 Add the CONFIG_ROMS config variable.
Tested under abuild, causes no trouble. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31 16:32:01 +00:00
Carl-Daniel Hailfinger 7ad11e8d33 Carl-Daniel's part:
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and 
mainboard_$VENDOR_$BOARD_config to mainboard_config.

Ron's part:
The config change that makes the naming change not break every build.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-18 20:41:57 +00:00
Stefan Reinauer ef6cb094b8 This patch makes the recently added assembler debug optional, as it may
cause problems with certain toolchains. This patch will also safe some hard
disk space for those of us working on laptops or netbooks with always too small
disks.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-20 20:13:01 +00:00
Carl-Daniel Hailfinger a5436c66bf Fix implicit declarations of get_bus_conf.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22 17:41:01 +00:00
Carl-Daniel Hailfinger 93159bf752 In the process of trying to debug some HT sync problems I added lots of
debug code to src/northbridge/amd/amdk8/incoherent_ht.c.
However, printk is not available for all boards at that stage.

I have changed the following boards:
agami/aruma
arima/hdama
asus/a8n_e
broadcom/blast
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms7135
newisys/khepri
sunw/ultra40
tyan/s2850
tyan/s2875
tyan/s2880
tyan/s2881
tyan/s2882
tyan/s2885
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882

abuild works fine for all of them.
agami/aruma needs a Config-abuild.lb which doesn't have fallback and
normal due to size problems.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-22 09:53:24 +00:00
Uwe Hermann 8eaafbf25a Use -O2 and -mcpu=p2 as romcc options for all Intel 440BX boards.
This should hopefully make the "too few registers" error pop up less often.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-12-10 15:42:37 +00:00
Stefan Reinauer 4ed326be5d This patch from Ralf Grosse Boerger makes debugging more comfortable.
With this patch it's possible to 

- determine the according source code line for each asm statement
  (objdump -dS)
- determine the source code file for each asm statement 
  (objdump -ddl)

This isn't exactly trivial because cache_as_ram_auto.c gets compiled to
assembly and converted by a perl script afterwards.

This patch solves the problem 
- by extending cache_as_ram_auto.inc with debug information and line
  numbers
- by correcting the perl calls (".text" --> "\.text")
- by creating a disassembly with source code and line numbers.
  (ctr0.disasm and
  coreboot.disasm)

There's one minor downside to the patch: A complete abuild run takes up
around 1.6G instead of about 700MB now. But I'm sure this is quite
reasonable for the benefits.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>

Please commit while this is being worked out.
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-28 12:09:17 +00:00
Uwe Hermann 1683cef996 Remove the unnecessary memctrl[] indirection, 440BX only has one
memory controller.

Also, drop some unused '#if 0' code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-27 00:47:07 +00:00
Uwe Hermann 4cf5ecf39d Get rid of the unnecessary indirection by 'struct mem_controller' for the
Intel 810 chipset (and all boards using it). This isn't required for this
chipset as there's only one memory controller.

This also helps a lot with romcc register usage, you should see the dreaded
"too few registers" less often.

Build-tested with all three boards using the Intel 810 chipset.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-20 23:18:10 +00:00
Uwe Hermann 3b6c527322 Always enable serial before SMBus (or as early as possible), as the SMBus
enable may do printk()s which result in a 2 minute delay on some boards.

Fix this on all boards which currently do smbus_enable() before enabling
the serial console.

Thanks to Elia Yehuda <z4ziggy@gmail.com> for tracking this bug down.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-11-11 14:26:03 +00:00
Mats Erik Andersson 13be848dfc Add initial support for the MSI MS-6147 mainboard.
Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3695 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-27 13:44:07 +00:00
Uwe Hermann 598ba43742 Drop tons of duplicated debug.c files, move common file to
lib/debug.c and use that one.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-12 22:34:08 +00:00
Carl-Daniel Hailfinger 2ee6779a64 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
code to use it. That makes the code more readable and also less
error-prone.

Abuild tested.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01 12:52:52 +00:00
Marc Jones 2080bd9a41 AMD K8 platforms must use CAR so it makes sense to use the PRINK_IN_CAR
option.
This patch converts the following patches to use PRTINK_IN_CAR
amd/serngeti_cheetah
msi/ms9185
msi/ms9828
supermicro/h8dmr

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-29 22:59:23 +00:00
Carl-Daniel Hailfinger 00809ebf02 This changes the python generated makefiles
targets/*/*/Makefile
        targets/*/*/normal/Makefile
        targets/*/*/fallback/Makefile

to use a common copy of romcc, and to leave this compiler untouched by
'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ .
'make clean' in targets/*/*/ will clean romcc.

Thanks to Mats for the initial idea and implementation of a tool to do
this. This patch has almost the same behaviour as the original tool
without having to run the tool each time.
Tested for abuild-friendliness.

The patch saves ~10-12 seconds for every target using romcc. For a full
abuild run, this is ~20% time saved.
For the first 38 abuild targets, total build time is down to 13m24s
instead of 16m22s on my machine.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04 13:44:00 +00:00
Jonathan A. Kollasch 4f9141758e Fix various issues on MSI MS-7135 board.
- W83627THF is strapped to 0x4e, not 0x2e
 - there's no device 9 on PCI-E x1 bus, it should be device 0
 - add mptable entries for AGR slot, based on info in user manual
 - enable floppy drive controller so that some legacy VGA ROMs will work

Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-06 13:26:32 +00:00
Uwe Hermann a2ccf9fe4e Add support for the MSI MS-6119 mainboard.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-03-17 13:37:34 +00:00
Jonathan A. Kollasch 8eff1e3d04 Initial support for MSI MS-7135 (K8N Neo3) mainboard.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-02-20 15:59:30 +00:00
Ronald G. Minnich 25a37449c5 This patch fixes the remaining stack protector problem on v2. The DISTRO_CFLAGS were not being
included on the CC line for cache_as_ram_auto.c

Tested on ubuntu, where formerly it failed.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-26 16:57:03 +00:00
Stefan Reinauer f8ee1806ac Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 15:08:58 +00:00
Stefan Reinauer 7e61e45402 Please bear with me - another rename checkin. This qualifies as trivial, no
code is changed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18 10:35:56 +00:00
Myles Watson 15674b78be This adds the same line (uses CONFIG_PRECOMPRESSED_PAYLOAD) to every
Options.lb file that already had a "uses CONFIG_COMPRESSED_PAYLOAD_LZMA"
line in it.

I figure that only adding it to the files that already have support
for LZMA payloads makes sure I don't break anything.

Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-09 17:18:29 +00:00
Uwe Hermann c716254e16 Fix up totally broken Super I/O config on the MS-6178. Add
PIRQ table to make most devices work. Random small fixes (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2953 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-08 02:28:43 +00:00
Uwe Hermann fb0b3e7787 Fix up totally broken Super I/O setup on the MSI MS-7260 (K9N Neo).
This has not been working at all until now. With this fix, keyboard,
mouse, parallel port, and the Super I/O sensors work fine (tested
on actual hardware).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 01:57:14 +00:00
Uwe Hermann d9ab798a2f Fix abuild for the MSI MS-7260 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2798 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 23:13:28 +00:00
Uwe Hermann 970d06b10d Add support for the MSI MS-7260 (K9N Neo) mainboard.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 15:56:05 +00:00
Uwe Hermann dde1d709a4 Fix abuild run of the MSI MS-6178 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2773 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13 09:55:44 +00:00
Uwe Hermann a9838cf796 Add a common/global failover.c file which can be used by all
(or at least most) mainboards. This should put and end to
copy-paste'ing the same file again and again for every mainboard.

Fix the build for the MSI MS-6178 target (wrong location of the common
failover.c file).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2772 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-13 08:38:24 +00:00
Uwe Hermann 41b88342b9 Add initial support for the Intel 810 based board MSI MS-6178.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey.osgood@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-12 22:11:33 +00:00
Stefan Reinauer f0cf523a9e add uses CONFIG_COMPRESSED_PAYLOAD_* to allow building the board in
abuild with a payload. Trivial

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-12 00:47:22 +00:00
Uwe Hermann 8a20213dde Fix some CHIP_NAME() entries to use canonical names.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-19 19:11:20 +00:00
Uwe Hermann 7014ef83b9 Fix typo (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-17 17:08:13 +00:00
Bingxun Shi fb1fddbab8 Add support for the MSI K9ND Master Series (ms9282) board.
Signed-off-by: Bingxun Shi <bingxunshi@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-09 00:26:10 +00:00
Ed Swierk be13dc72d9 Apply linuxbios-rename-other-payload-options.patch
(Patch 2, refs #14)

Signed-off-by: Ed Swierk <eswierk@arastra.com> 
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15 12:56:28 +00:00
Ed Swierk 1a7a5b49c5 Apply linuxbios-rename-compressed-payload-options.patch, refs #14
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-12-15 11:42:16 +00:00
Stefan Reinauer ca6312010d * fix the automatic build system by compressing payloads if possible
and leaving enough room for a real payload (not /dev/null)

  This is a wonderful example why "uses" sucks.

* add Config-abuild.lb for those boards that dont build with 
  the default settings and a real payload:
  arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326

* if lzma is installed and a real payload is used, try compressing
  it. 

* fix a small bug in "abuild --help"

This patch is acked by me because its due to infrastructural changes only.
Flames welcome.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-10 13:30:28 +00:00
bxshi faea4c59ab Sorry, this is the last commit I will do this way, but MSI has waited a
long time and I could not get into the tracker. 

These are patches to enable ms9185 support. Abuild passes. 

Signed-off-by: bxshi <bxshi@msik.com.cn>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2486 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-02 16:02:33 +00:00