Commit graph

12 commits

Author SHA1 Message Date
Kyösti Mälkki
e2227a23a7 usbdebug: Move under drivers/usb
Also relocate and split header files, there is some interest
for EHCI debug support without PCI.

Change-Id: Ibe91730eb72dfe0634fb38bdd184043495e2fb08
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5129
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-02-06 11:13:57 +01:00
Kyösti Mälkki
a1179cafdb usbdebug AMD: Add choice of EHCI controller
Chipsets sb700 and sb800/hudson have more than one USB EHCI controller,
implement the selection logic using already existing Kconfig option.

Change-Id: I9e0df1669d73863c95c36a3a7fee40d58f6f097e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3928
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-09-25 07:50:37 +02:00
Kyösti Mälkki
8101aa6bb0 usbdebug: Support choice of EHCI controller
Nowadays, chipsets or boards do not only have one USB port with the
capabilities of a debug port but several ones. Some of these ports are
easier accessible than others, so making them configurable is also necessary.
This change adds infrastructure to switch between EHCI controllers,
but does not implement it for any chipset.

Change-Id: I079643870104fbc64091a54e1bfd56ad24422c9f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3438
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-08-29 18:36:20 +02:00
Kyösti Mälkki
2410010018 usbdebug: Change debug port scanning
On AMD platforms, setting of USBDEBUG_DEFAULT_PORT=0 tries to scan
all physical ports one after other in incrementing order. To avoid
possible problems with other USB devices, one can select the port
number here and bypass the scan.

Intel platforms can communicate with usbdebug dongle on one
physical port only, and this option makes no difference there.

Change-Id: I45be6cc3aa91b74650eda2d444c9fcad39d58897
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3872
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-08-29 18:35:47 +02:00
Kyösti Mälkki
021fa78bca usbdebug: Change reference to EHCI BAR
Change the defines, as follow-up patch will replace use of
constant CONFIG_EHCI_BAR.

Change-Id: I44ff77cb7a2826f3b43d8d46440fd4482a29d18c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3875
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-08-24 07:38:52 +02:00
Kyösti Mälkki
1fd7508121 usbdebug: Use __SIMPLE_DEVICE__ on early enable
With USBDEBUG selected, the file is built for both romstage and
ramstage. For the ramstage build, we need to explicitly use the
simple PCI config operations without devicetree.

Change-Id: I2de8d9c77bb458ba797c3aac9e2cd0d653e06684
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3437
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-08-07 19:21:48 +02:00
Kyösti Mälkki
04372975bd AMD sb800 agesa/hudson: Use PCI defines
The original lines had contradicting comment and code.
This change follows the code and sets MASTER bit too.

Change-Id: Id2886bfc107612530f0e9747e5d49a9740fb8532
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3466
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-14 18:54:57 +02:00
Stefan Reinauer
24d1d4b472 x86: Unify arch/io.h and arch/romcc_io.h
Here's the great news: From now on you don't have to worry about
hitting the right io.h include anymore. Just forget about romcc_io.h
and use io.h instead. This cleanup has a number of advantages, like
you don't have to guard device/ includes for SMM and pre RAM
anymore. This allows to get rid of a number of ifdefs and will
generally make the code more readable and understandable.

Potentially in the future some of the code in the io.h __PRE_RAM__
path should move to device.h or other device/ includes instead,
but that's another incremental change.

Change-Id: I356f06110e2e355e9a5b4b08c132591f36fec7d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2872
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-03-22 00:00:09 +01:00
Paul Menzel
a46a712610 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«
In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.

The following command was used to convert all files.

    $ git grep -l 'MA  02' | xargs sed -i 's/MA  02/MA 02/'

[1] http://www.gnu.org/licenses/gpl-2.0.txt

Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-03-01 10:16:08 +01:00
Zheng Bao
b01097e0fe USBDEBUG: Enable the EHCI in AMD Southbridge
Since SB800, USB2.0 debug port is dev 0x12, func 2.

Change-Id: Ie0e33cb2f0833b0baeef81323e1a0634242fbe55
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1880
Tested-by: build bot (Jenkins)
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-28 21:16:42 +01:00
Stefan Reinauer
b3ae1867d1 * Set USBDEBUG_DEFAULT_PORT in all southbridges and use that value
to unify calls to *_enable_usbdebug()
* rename *_enable_usbdebug() to enable_usbdebug()
* move enable_usbdebug() to generic romstage console init code
  and drop it from the individual romstage.c files.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-04-18 23:51:12 +00:00
Zheng Bao
d098575b0e This sb800 code is derived from sb700.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-01-20 04:45:48 +00:00