Commit Graph

74 Commits

Author SHA1 Message Date
Ronald G. Minnich c817926a6b via epia; also yh lu tyan.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26 04:45:52 +00:00
Ronald G. Minnich 57cef6590b added via vt8231
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1132 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 17:21:57 +00:00
Stefan Reinauer bb79b0efb8 remove last occurence of AMD8111_DEV
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25 12:54:55 +00:00
Eric Biederman e9a271e32c - Major update of the dynamic device tree so it can handle
* subtractive resources
  * merging with the static device tree
  * more device types than just pci
- The piece to watch out for is the new enable_resources method that was needed in all of the drivers


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-02 03:36:25 +00:00
Ronald G. Minnich fa2df758f2 support for new mobos and fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-27 14:33:13 +00:00
Greg Watson a1cd3d8290 moved extern to chip.h
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1046 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28 21:06:51 +00:00
Ronald G. Minnich ebb645a9fb YhLu's changes to resolve several memory and other problems.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25 03:05:54 +00:00
Greg Watson 39264e2b3b new static configuration
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1016 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-23 21:33:03 +00:00
Eric Biederman 860ad373ef - First pass at code for generic link width and size determination
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 23:30:29 +00:00
Eric Biederman 2c018fba95 - First pass at s2880 support.
- SMP cleanups (remove SMP only use CONFIG_SMP)
- Minor tweaks to romcc to keep it from taking forever compiling
- failover fixes
- Get a good implementation of k8_cpufixup and sizeram for the opteron


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-21 20:13:45 +00:00
Ronald G. Minnich 5289938f06 Config.lb for this new part
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 04:35:19 +00:00
Eric Biederman 4086d16ba2 - Implement an enable method for pci devices.
- Add initial support for the amd8131
- Update the mptable to something possible
- hdama/Config add the amd8131 southbridge


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-17 03:26:03 +00:00
Greg Watson 50086df616 new config files
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-14 19:02:29 +00:00
Eric Biederman 3d3f438937 - Use an SMBUS_IO_BASE value that will not conflict with an automatically assigned value
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12 01:48:30 +00:00
Eric Biederman d3283ec05f - A new test case for romcc
- Minor romcc fixes
- In smbus_wail_until_done a romcc glitch with || in romcc where it likes
  to run out of registers.  Use | to be explicit that I don't need the short
  circuiting behavior.
- Remove unused #defines from coherent_ht.c
- Update the test in auto.c to 512M
- Add definition of log2 to romcc_io.h
- Implement SPD memory sizing in raminit.c
- Reduce the number of memory devices back 2 to for the SOLO board.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18 11:03:18 +00:00
Ronald G. Minnich 99acb49cf7 added config and other test files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 16:51:06 +00:00
Eric Biederman 8d9c123812 - Minor mod to reset16.inc to work with newer binutils hopefully this works with older ones...
- Update apic.h to include the APIC_TASK_PRI register definition
- Update mptable.c to have a reasonable board OEM and productid
- Additional testfiles for romcc.
- Split out auto.c and early failover.c moving their generic bits elsewere
- Enable cache of the rom
- Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17 08:42:17 +00:00
Greg Watson f7092040fd More FB2 stuff
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 22:07:53 +00:00
Greg Watson 64b2e474b1 Updated.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-13 17:16:36 +00:00
Eric Biederman 7a5416af95 - Modify the freebios tree so the pci config space api is mostly in sync between
code that runs without ram and code that runs with ram.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 19:23:51 +00:00
Eric Biederman 540ae01cd3 - Changes to the pci config routines moving them closer to the non romcc API
The goal is to have the same interface with or without romcc.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-12 17:55:54 +00:00
Eric Biederman 05f26fcb57 - Factoring of auto.c
- Implementation of fallback/normal support for the amd solo board
- Minor bugfix in romcc


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11 21:55:00 +00:00
Greg Watson f655bf7f3e Moved from freebios
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-09 21:59:27 +00:00
Eric Biederman 526855741b - Cleanups on the romcc side including a pci interface that uses
fewer registers, and is easier to hardcode.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-19 19:16:21 +00:00