Commit Graph

543 Commits

Author SHA1 Message Date
Uwe Hermann 825c809efe Add support for Intel 440MX systems.
Add support for the Fujitsu MBM29F400TC flash part.

Detection and reading works, writing is not tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-30 00:56:50 +00:00
Peter Lemenkov 5384dac57e Added Am29LV040B
Looking through the sources of Uniflash utility I found that this chip
is no more no less than low-voltage variant of Am29F040B but with
different ID.

So I created a very quick patch (attached).

Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-25 04:11:11 +00:00
Stefan Reinauer 50542a884b This change removes all warnings from romcc in my build environment,
making the output of "make -s" finally usable.. (still trivial, doesn't
change any logic or remove any code)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24 11:14:14 +00:00
Stefan Reinauer a9e5821fdd smaller changes to silence build warnings. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-24 11:12:15 +00:00
Peter Lemenkov 2ef39274a3 Flashrom: Add more Vendor IDs and ensure correct sorting in flash.h.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2884 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22 20:36:16 +00:00
Carl-Daniel Hailfinger c4a0b911d1 Introduce block and sector erase routines to flashrom, but do not use
them yet.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-22 16:15:28 +00:00
Carl-Daniel Hailfinger bd7602314b Remove hardcoded wait from SPI write/erase routines and check the chip
status register instead.
This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18 17:56:42 +00:00
Uwe Hermann 69a392b5c6 Documentation fixes and updates (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18 00:29:05 +00:00
Carl-Daniel Hailfinger 79aa01a6c3 Add generic SPI flash erase and write support to flashrom. The first
chip the code was tested and verified with is the Macronix MX25L4005,
but other chips should work as well.
Timeouts are still hardcoded to data sheet maxima, but the status
register checking code is already there.
Thanks to Harald Gutmann for the initial code on which this is loosely
based.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-18 00:24:07 +00:00
Uwe Hermann dcb9abdf4c Some cosmetic cleanups in the flashrom code and output.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 23:55:15 +00:00
Uwe Hermann 7dabe5ea0d Drop support for the --human-readable option. It's not any more useful than
the --dump option, it just means lots of additional work for no gain, IMO.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 23:43:59 +00:00
Uwe Hermann d937b5243c Print the version number always, not only in verbose mode.
We often want to know the exact version number of superiotool which
was used to gather a certain output/dump.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 23:42:02 +00:00
Idwer Vollering 7a90c14e9c Add dump support for the Winbond W83697SF.
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 23:37:36 +00:00
Carl-Daniel Hailfinger 84453c02f7 Fix wrong values/typos in chipset_enable.c. This has been confirmed by
Ed Swierk in
http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html .

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-17 22:30:07 +00:00
Uwe Hermann f8dabccdbf Multiple flashrom fixes:
- Install binary in /usr/sbin (not /usr/bin), as it's a root-only tool.

 - Rename manpage from flashrom.1 to flashrom.8, as section 8 contains
   "System administration commands (usually only for root)".

 - Actually install the manpage upon 'make install'.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 23:36:34 +00:00
Uwe Hermann 398b605ddb Add detection support for the Winbond W83977AF as found in the
Advantech PCM-5820 board (confirmed by Erwan Velu <erwan@seanodes.com>
on IRC). Trivial (and tested) patch.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 21:56:32 +00:00
Michael van der Kolff e62537a948 Add Gigabyte M61P-S3 SPI flash support to board_enable.c
Signed-off-by: Michael van der Kolff <mvanderkolff@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 21:18:43 +00:00
Carl-Daniel Hailfinger 259aaf00f5 Convert the existing it8716f_* functions to generic_spi_* functions by
applying abstraction and wrapping.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 21:09:06 +00:00
Uwe Hermann dc34cab5cb Fix the detection for the Winbond W83697SF. Unfortunately the revision
has a slightly different format than that of the W83697UF/UG so we have
to hack around it a bit.

This patch has been verified to work on real hardware by
Idwer Vollering <idwer_v@hotmail.com> on IRC (thanks!).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 18:15:25 +00:00
Idwer Vollering 92d3434f87 Dump support for the Winbond W83977TF.
Signed-off-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-16 00:34:03 +00:00
Carl-Daniel Hailfinger 16f6171eda (forgot to add spi.c)
Move SPI code out of board_enable.c where it started its life. The SPI
chip finding and SPI chip accessor code is moved as well. This can be
split later if we feel like it.

The non-use of svn cp is intentional because the only history we'd have
to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15 21:45:29 +00:00
Carl-Daniel Hailfinger a28edc524b Move SPI code out of board_enable.c where it started its life. The SPI
chip finding and SPI chip accessor code is moved as well. This can be
split later if we feel like it.

The non-use of svn cp is intentional because the only history we'd have
to preserve are a few commits which were early prototypes of chip
identification code. For those who intend to look at that history, they
can look at board_enable.c revision 2853.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15 21:44:47 +00:00
Uwe Hermann 72c0584d37 Fix stupid thinko in the Winbond detection code which prevented some
of the Winbond chips from being detected (trivial fix).

This is verified on real hardware and works fine now.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-15 15:46:59 +00:00
Uwe Hermann 4910809cad Add dump support for the NSC PC8374L (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-14 17:02:15 +00:00
Ulf Jordan 39a5bf74ef Set the superiotool version number from svn at build time.
Signed-off-by: Ulf Jordan <jordan@chalmers.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13 18:06:12 +00:00
Stefan Reinauer 45c1556df9 Dump support for the SMSC LPC47N227.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2851 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-13 17:06:21 +00:00
Ronald G. Minnich c63643dc90 Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC day :-)
Also minor changes to remove tab-space combinations where possible. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Index: jedec.c
===================================================================
--- jedec.c	(revision 2847)
+++ jedec.c	(working copy)
@@ -281,7 +281,7 @@
 	// dumb check if erase was successful.
 	for (i = 0; i < total_size; i++) {
 		if (bios[i] != (uint8_t) 0xff) {
-			printf("ERASE FAILED\n");
+			printf("ERASE FAILED @%d, val %02x\n", i, bios[i]);
 			return -1;
 		}
 	}
Index: board_enable.c
===================================================================
--- board_enable.c	(revision 2847)
+++ board_enable.c	(working copy)
@@ -153,7 +153,8 @@
 		return 1;
 	}
 	/* Start IO, 33MHz, readcnt input bytes, writecnt output bytes. Note:
-	   We can't use writecnt directly, but have to use a strange encoding */
+	 * We can't use writecnt directly, but have to use a strange encoding 
+	 */ 
 	outb((0x5 << 4) | ((readcnt & 0x3) << 2) | (writeenc), port);
 	do {
 		busy = inb(port) & 0x80;
@@ -202,43 +203,39 @@
 /*
  * Helper functions for many Winbond Super I/Os of the W836xx range.
  */
-#define W836_INDEX 0x2E
-#define W836_DATA  0x2F
-
 /* Enter extended functions */
-static void w836xx_ext_enter(void)
+static void w836xx_ext_enter(uint16_t port)
 {
-	outb(0x87, W836_INDEX);
-	outb(0x87, W836_INDEX);
+	outb(0x87, port);
+	outb(0x87, port);
 }
 
 /* Leave extended functions */
-static void w836xx_ext_leave(void)
+static void w836xx_ext_leave(uint16_t port)
 {
-	outb(0xAA, W836_INDEX);
+	outb(0xAA, port);
 }
 
 /* General functions for reading/writing Winbond Super I/Os. */
-static unsigned char wbsio_read(unsigned char index)
+static unsigned char wbsio_read(uint16_t index, uint8_t reg)
 {
-	outb(index, W836_INDEX);
-	return inb(W836_DATA);
+	outb(reg, index);
+	return inb(index+1);
 }
 
-static void wbsio_write(unsigned char index, unsigned char data)
+static void wbsio_write(uint16_t index, uint8_t reg, uint8_t data)
 {
-	outb(index, W836_INDEX);
-	outb(data, W836_DATA);
+	outb(reg, index);
+	outb(data, index+1);
 }
 
-static void wbsio_mask(unsigned char index, unsigned char data,
-		       unsigned char mask)
+static void wbsio_mask(uint16_t index, uint8_t reg, uint8_t data, uint8_t mask)
 {
-	unsigned char tmp;
+	uint8_t tmp;
 
-	outb(index, W836_INDEX);
-	tmp = inb(W836_DATA) & ~mask;
-	outb(tmp | (data & mask), W836_DATA);
+	outb(reg, index);
+	tmp = inb(index+1) & ~mask;
+	outb(tmp | (data & mask), index+1);
 }
 
 /**
@@ -248,37 +245,80 @@
  *  - Agami Aruma
  *  - IWILL DK8-HTX
  */
-static int w83627hf_gpio24_raise(const char *name)
+static int w83627hf_gpio24_raise(uint16_t index, const char *name)
 {
-	w836xx_ext_enter();
+	w836xx_ext_enter(index);
 
 	/* Is this the w83627hf? */
-	if (wbsio_read(0x20) != 0x52) {	/* SIO device ID register */
+	if (wbsio_read(index, 0x20) != 0x52) {	/* Super I/O device ID register */
 		fprintf(stderr, "\nERROR: %s: W83627HF: Wrong ID: 0x%02X.\n",
-			name, wbsio_read(0x20));
-		w836xx_ext_leave();
+			name, wbsio_read(index, 0x20));
+		w836xx_ext_leave(index);
 		return -1;
 	}
 
 	/* PIN89S: WDTO/GP24 multiplex -> GPIO24 */
-	wbsio_mask(0x2B, 0x10, 0x10);
+	wbsio_mask(index, 0x2B, 0x10, 0x10);
 
-	wbsio_write(0x07, 0x08);	/* Select logical device 8: GPIO port 2 */
+	wbsio_write(index, 0x07, 0x08);	/* Select logical device 8: GPIO port 2 */
 
-	wbsio_mask(0x30, 0x01, 0x01);	/* Activate logical device. */
+	wbsio_mask(index, 0x30, 0x01, 0x01);	/* Activate logical device. */
 
-	wbsio_mask(0xF0, 0x00, 0x10);	/* GPIO24 -> output */
+	wbsio_mask(index, 0xF0, 0x00, 0x10);	/* GPIO24 -> output */
 
-	wbsio_mask(0xF2, 0x00, 0x10);	/* Clear GPIO24 inversion */
+	wbsio_mask(index, 0xF2, 0x00, 0x10);	/* Clear GPIO24 inversion */
 
-	wbsio_mask(0xF1, 0x10, 0x10);	/* Raise GPIO24 */
+	wbsio_mask(index, 0xF1, 0x10, 0x10);	/* Raise GPIO24 */
 
-	w836xx_ext_leave();
+	w836xx_ext_leave(index);
 
 	return 0;
 }
 
+static int w83627hf_gpio24_raise_2e(const char *name)
+{
+	return w83627hf_gpio24_raise(0x2d, name);
+}
+
 /**
+ * Winbond W83627THF: GPIO 4, bit 4
+ *
+ * Suited for:
+ *  - MSI K8N-NEO3
+ */
+static int w83627thf_gpio4_4_raise(uint16_t index, const char *name)
+{
+	w836xx_ext_enter(index);
+	/* Is this the w83627thf? */
+	if (wbsio_read(index, 0x20) != 0x82) {	/* Super I/O device ID register */
+		fprintf(stderr, "\nERROR: %s: W83627THF: Wrong ID: 0x%02X.\n",
+			name, wbsio_read(index, 0x20));
+		w836xx_ext_leave(index);
+		return -1;
+	}
+
+	/* PINxxxxS: GPIO4/bit 4 multiplex -> GPIOXXX */
+
+	wbsio_write(index, 0x07, 0x09);	/* Select logical device 9: GPIO port 4 */
+
+	wbsio_mask(index, 0x30, 0x02, 0x02);	/* Activate logical device. */
+
+	wbsio_mask(index, 0xF4, 0x00, 0x10);	/* GPIO4 bit 4 -> output */
+
+	wbsio_mask(index, 0xF6, 0x00, 0x10);	/* Clear GPIO4 bit 4 inversion */
+
+	wbsio_mask(index, 0xF5, 0x10, 0x10);	/* Raise GPIO4 bit 4 */
+
+	w836xx_ext_leave(index);
+
+	return 0;
+}
+
+static int w83627thf_gpio4_4_raise_4e(const char *name)
+{
+	return w83627thf_gpio4_4_raise(0x4E, name);
+}
+/**
  * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs.
  *
  * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there.
@@ -335,12 +375,12 @@
 	pci_write_byte(dev, 0x59, val);
 
 	/* Raise ROM MEMW# line on Winbond w83697 SuperIO */
-	w836xx_ext_enter();
+	w836xx_ext_enter(0x2E);
 
-	if (!(wbsio_read(0x24) & 0x02))	/* flash rom enabled? */
-		wbsio_mask(0x24, 0x08, 0x08);	/* enable MEMW# */
+	if (!(wbsio_read(0x2E, 0x24) & 0x02))	/* flash rom enabled? */
+		wbsio_mask(0x2E, 0x24, 0x08, 0x08);	/* enable MEMW# */
 
-	w836xx_ext_leave();
+	w836xx_ext_leave(0x2E);
 
 	return 0;
 }
@@ -487,9 +527,11 @@
 	{0x10de, 0x0360, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
 	 "gigabyte", "m57sli", "GIGABYTE GA-M57SLI", it87xx_probe_serial_flash},
 	{0x1022, 0x7468, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-	 "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise},
+	 "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e},
+	{0x10de, 0x005e, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+	 "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e},
 	{0x1022, 0x746B, 0x1022, 0x36C0, 0x0000, 0x0000, 0x0000, 0x0000,
-	 "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise},
+	 "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e},
 	{0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01,
 	 NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m},
 	{0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118,
@@ -509,8 +551,8 @@
  * Match boards on LinuxBIOS table gathered vendor and part name.
  * Require main PCI IDs to match too as extra safety.
  */
-static struct board_pciid_enable *board_match_linuxbios_name(char *vendor,
-							     char *part)
+static struct board_pciid_enable *board_match_linuxbios_name(char *vendor, 
+								char *part)
 {
 	struct board_pciid_enable *board = board_pciid_enables;
 
@@ -525,10 +567,11 @@
 			continue;
 
 		if (board->second_vendor &&
-		    !pci_dev_find(board->second_vendor, board->second_device))
+			!pci_dev_find(board->second_vendor, board->second_device))
 			continue;
 		return board;
 	}
+	printf("NOT FOUND %s:%s\n", vendor, part);
 	return NULL;
 }
 
@@ -545,20 +588,20 @@
 			continue;
 
 		if (!pci_card_find(board->first_vendor, board->first_device,
-				   board->first_card_vendor,
-				   board->first_card_device))
+					board->first_card_vendor,
+					board->first_card_device))
 			continue;
 
 		if (board->second_vendor) {
 			if (board->second_card_vendor) {
 				if (!pci_card_find(board->second_vendor,
-						   board->second_device,
-						   board->second_card_vendor,
-						   board->second_card_device))
+						board->second_device,
+						board->second_card_vendor,
+						board->second_card_device))
 					continue;
 			} else {
 				if (!pci_dev_find(board->second_vendor,
-						  board->second_device))
+							board->second_device))
 					continue;
 			}
 		}
@@ -582,7 +625,7 @@
 
 	if (board) {
 		printf("Found board \"%s\": Enabling flash write... ",
-		       board->name);
+			board->name);
 
 		ret = board->enable(board->name);
 		if (ret)


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2850 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-12 21:22:40 +00:00
Uwe Hermann 6dbc0e12da Superiotool manpage/documentation improvements (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2849 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-11 18:30:05 +00:00
Uwe Hermann f904a596d0 Revert my last cleanup patch.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2847 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10 17:42:20 +00:00
Uwe Hermann 5982a0641b Cosmetic changes to make the flashrom output more consistent (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-10 16:31:30 +00:00
Uwe Hermann 0446dbbd60 Fixup a register dump attached to the wrong Super I/O. Seems something
went wrong in one of the recent commits.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 01:59:46 +00:00
Uwe Hermann 14f304ace1 Add detection support for lots more SMSC Super I/Os (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2841 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-08 01:11:11 +00:00
Uwe Hermann 44bb777062 Some more ITE chips and small fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 21:50:29 +00:00
Uwe Hermann abeb63df5f Detection support for a bunch of NSC Super I/Os (trivial).
Also, dump support for the NSC PC87351.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2837 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 21:48:26 +00:00
Uwe Hermann e9d4616a95 Print a short message if no Super I/O chip could be detected (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 20:01:23 +00:00
Uwe Hermann 84bf1e2506 Add a list of contributors to the README (trivial). Also, a small hint
about where to send additional register dumps.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 19:10:24 +00:00
David Hendricks c387b0b89e Add dump support for the Winbond W83627THF/THG.
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 19:04:26 +00:00
Uwe Hermann 09203573c1 Add a manpage for superiotool (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2832 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 15:26:40 +00:00
Robinson P. Tryon 8a9c03f0de Dump support for the SMSC FDC37B72x.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 15:12:12 +00:00
Robinson P. Tryon e1073f1a54 Dump support for the SMSC FDC37B78x.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 15:04:17 +00:00
Robinson P. Tryon 87c4999672 Dump support for the SMSC FDC37M81x.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-07 14:33:13 +00:00
Rasmus Wiman 409b4f2273 Add dump support for the Winbond W83627HF/F/HG/G.
Signed-off-by: Rasmus Wiman <rasmus@wiman.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 21:58:03 +00:00
Uwe Hermann 23740c82e2 Add dump support for the SMSC LPC47M10x (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2826 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 15:11:38 +00:00
Robinson P. Tryon dc81769c9c Add dump support for the ITE IT8661F. Note that this chip will not yet
be detected, as it needs a non-standard init sequence.

Minor other fix: Drop incorrect 0x2b from LDN 5 of the ITE IT8705F.

Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-05 13:47:04 +00:00
Uwe Hermann 5debf36d9d Add some more Winbond chips (trivial).
Add notes which IDs were taken from sensors-detect (as where we lack
datasheets, thus cannot verify them) and which we support but sensors-detect
does not (yet). I'll post patches on the lm-sensors list to sync up
the detected chips between superiotool and sensors-detect.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 18:34:36 +00:00
Uwe Hermann db5f953754 Add detection support for the LPC47B387 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 16:28:56 +00:00
Robinson P. Tryon 4354103078 Add dump support for the ITE IT8705F/AF.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 15:44:19 +00:00
Uwe Hermann 8b8d03974e * Convert the NSC code to the common code structure all other Super I/Os use.
* Improve the --verbose output a bit more. Print the "Probing..." text for
   all Super I/Os and if a Super I/O is not known, show the data we were
   able to read from the chip (what data this is is very vendor/chip specific).

 * Thus the common no_superio_found() is dropped, it's not useful.
   The "read from 0x20" part was wrong for all Super I/Os other than the
   NSC ones anyway.

 * Winbond: For the 'olddevid' only use bits 3..0, mask away the others.

 * SMSC: Print which ID registers we try to read (in --verbose mode).

 * Minor cosmetic fixes.
   * Rename PC8374 to PC8374L (as per datasheet).
   * Rename probe_idregs_simple() to probe_idregs_nsc().
   * Rename dump_readable_ns8374() to dump_readable_pc8374l().

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2821 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 15:23:38 +00:00
Jordan Crouse 573ff508ab [FLASHROM] Fix the help, and print a message when nothing happens
The help implied that writes happen by default, which they don't.  Fix
the text, and say something when we dont specify any commands.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>    
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2820 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-04 06:26:41 +00:00
Uwe Hermann 209148c535 Add a copy of the GPL (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-03 18:56:51 +00:00
Robinson P. Tryon ec1edd1cd9 Print superiotool version when run with --verbose.
Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-02 23:32:21 +00:00
Carl-Daniel Hailfinger 0de6f0a36f This patch aims to restructure SPI flash support in a more reasonable
way. It introduces a generic SPI host driver for the IT8716F Super I/O
which will enable easy SPI programming without having to care for the
peculiarities of the SPI host.

To activate probing for the IT8716F, you have to use the gigabyte:m57sli
mainboard override. SPI support will then use the gathered SPI host data
to access the SPI flash.

This has been tested sucessfully by Ward Vandewege <ward@gnu.org> on the
GA-M57SLI v2.0, which has a MX25L4005 SPI flash part.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-02 15:49:25 +00:00
Uwe Hermann e4d4ebabbd De-uglify the --version output (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2815 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-10-01 13:39:02 +00:00
Uwe Hermann afe8309202 Random minor fixes. Use svn revision as superiotool version number.
Make the -V output more informative.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 15:45:43 +00:00
Uwe Hermann 945045b1ea Add support for some more Fintek chips and an ALi chip.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 15:39:10 +00:00
Uwe Hermann 5f45fc234f Fix up the SMSC detection code to probe _both_ old- and new-style
Super I/Os from SMSC. Otherwise not all of them are detected (and there
could theoretically be _two_ of them in a system, so we should probe
for both types anyway).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-28 15:02:17 +00:00
Carl-Daniel Hailfinger 7fe8f5da4d Add preliminary SPI flash identification support for SPI chips attached
to ITE IT8716F Super I/O. Right now this is hardcoded to the Gigabyte
M57SLI board. It works only with rev 2.0 of the board, but it will bail
out on earlier versions, so no damage can occur.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2811 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-27 14:29:57 +00:00
Uwe Hermann c3da36681d Add detection support for lots more Winbond Super I/Os (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26 16:14:16 +00:00
Uwe Hermann e0ffaa164d Dump support for the Fintek F71805 (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-26 15:48:09 +00:00
Uwe Hermann 48cac24742 Detection support for the Winbond W83627HF (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2806 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 23:24:46 +00:00
Ward Vandewege 2ee78d8b06 Fix compilation warning.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 22:02:31 +00:00
Uwe Hermann 0f86732a5e Add detection support for quite a number of SMSC Super I/Os. Also, add
dump support for the SMSC DME1737 and the ASUS A8000. Random minor fixes.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2803 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-24 01:40:09 +00:00
Uwe Hermann 6b4ad4304a Minor fixes/improvements in the Fintek code (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2802 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-23 13:17:29 +00:00
Uwe Hermann 420f6abc11 Add register dump capability for ITE IT8718F (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-21 14:48:04 +00:00
Uwe Hermann eddc473ce0 Add -D / --dump-readable option which prints the Super I/O register
contents in human-readable form (e.g. "COM1 enabled" etc.) instead
of the hex-table format from -d / --dump.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2795 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 23:57:44 +00:00
Uwe Hermann b4db2209f9 Decouple the ITE code from fintek.c, it doesn't belong there.
Add common 'enter configuration mode' function for most Winbond/Fintek/ITE
chips which use the 0x87 0x87 sequence for that reason.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 23:37:56 +00:00
Uwe Hermann 0702469f16 Fix up and generalize the ITE IT8708F code. It was only working out of
pure luck (and broken code elsewhere). Needs some more fixing.

Add more LDN descriptions to various Super I/Os.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 22:13:48 +00:00
Uwe Hermann 2c290e3362 Superiotool: Add dump support to the Winbond W83697HF/F.
Minor coding style changes and code simplifications.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-20 00:00:49 +00:00
Uwe Hermann e474956590 Implement usage for --help and put the same information into the README, too.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 16:26:18 +00:00
Uwe Hermann 7e7e9ac607 Add support for the Winbond W83697HF/F and W83627EHF/EF/EHG/EG.
Various minor fixes and improvements (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 15:52:23 +00:00
Uwe Hermann 3acf31e4ea Further code simplifications and improvements.
Add command line option handling code. The following options
are defined at the moment:

-d|--dump      Dump Super I/O registers.
-V|--verbose   Verbose mode.
-v|--version   Show the superiotool version.
-h|--help      Show a short help text.

Per default (no options) we just probe for a Super I/O
and print its vendor, name, ID, version, and config port.

Example:

$ ./superiotool
Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0

$ ./superiotool -d
Found SMSC FDC37N769 Super I/O (id=0x28, rev=0x01) at port=0x03f0
idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00
def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00

$ ./superiotool -s
./superiotool: invalid option -- s

$ ./superiotool -h
Usage: superiotool [-d] [-V] [-v] [-h]

$ ./superiotool -v
superiotool 0.1


Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 01:55:35 +00:00
Uwe Hermann 25a6c0f18c Split out enter_conf_mode_*()/exit_conf_mode_() functions, we'll soon need
them. Reduce code duplication a bit by improved 'no dump available' handling.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:48:42 +00:00
Uwe Hermann de24a0e585 Use uint16_t and friends where appropriate (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-19 00:03:14 +00:00
Uwe Hermann d754d2c6c4 Make the code a bit more generic (trivial). Different Super I/Os
use different config ports.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 23:30:24 +00:00
Uwe Hermann 6ff6af7621 Superiotool: Add support for the SMSC FDC37N769.
Here's what a register dump looks like on my test system:

No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
No Super I/O chip found at 0x002e
No Super I/O chip found at 0x004e
Super I/O found at 0x03f0: id=0x28, rev=0x01
SMSC FDC37N769
idx 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 
val 20 90 80 f4 00 00 ff 00 00 00 40 00 0e 28 01 00 00 00 00 00 02 00 01 03 00 00 00 00 00 00 80 00 00 00 00 00 00 ba 00 00 03 00 00 23 03 03 00 00 
def 28 9c 88 70 00 00 ff 00 00 00 00 00 02 28 NA 00 00 80 RR RR NA NA NA 03 RR RR RR RR RR RR 80 00 3c RR RR 00 00 00 00 00 00 00 RR 00 00 03 00 00 
Probing 0x0370, failed (0xff), data returns 0xff

I'm self-acking this as it's pretty simple stuff, but please let me
know if anything could be improved here, or if you think this
is not trivial enough to warrant self-acking.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 22:24:34 +00:00
Uwe Hermann d8a18a2adb Add a README for superiotool (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2780 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-18 00:01:27 +00:00
Uwe Hermann 519419b476 Split out a dump_superio() function from ite.c, and make it slightly more
generic, so that we can use it for other Super I/Os, too.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 20:59:01 +00:00
Uwe Hermann 4cb7e71732 Make 'struct superio_registers' globally available, pretty much
all Super I/Os can (and should!) use this (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 18:17:44 +00:00
Uwe Hermann 0120e1a3d8 Split up superiotool.c into multiple source files, one per vendor.
As there will be lots more supported Super I/Os soon, the file is
really getting way too big...

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-16 18:11:03 +00:00
Alex Beregszaszi 7798c888e8 Change out/in combinations to pci_read/write_byte in
sis630 chipset enable.

Signed-off-by: Alex Beregszaszi <alex@rtfs.hu>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2770 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-11 15:58:18 +00:00
Uwe Hermann f9b0f7fd91 Remove useless 'extern' keywords (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2769 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:24:29 +00:00
Uwe Hermann 863c1bf525 Add '(C)' where it's missing (for consistency reasons).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2768 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:21:05 +00:00
Uwe Hermann 09735cb517 Add missing license header to udelay.c.
I'm self-ack'ing this, as the origin of the code in udelay.c (and thus
the license and copyright owner) is pretty clear.

The code which is now in udelay.c was split out from flash_rom.c in r1428,
and flash_rom.c, in turn, has been around since the beginning and had a
'Copyright 2000 Silicon Integrated System Corporation' line as well as the
usual GPLv2-or-later license header.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2767 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-09 20:02:45 +00:00
Uwe Hermann 9398958cfa Add a copy of the GPL in the flashrom repository as it's an independent
project (being packaged by distros, among other things).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2764 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-08 14:36:01 +00:00
Uwe Hermann 98ef9cefc8 Small consistency fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2762 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 21:20:29 +00:00
Uwe Hermann 2046ff92f0 Various coding style and whitespace fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 21:02:44 +00:00
Carl-Daniel Hailfinger c4c54a5df3 Add ITE IT8716F support to probe_superio. This helps especially
GA-M57SLI board owners who wish to debug remaining problems or handle
SPI flash of newer board versions.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2760 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 20:24:30 +00:00
Uwe Hermann 1ae8e83baa Rename probe_superio.c to superiotool.c.
Flesh out Makefile with all the usual stuff, e.g. install targets etc.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 20:20:41 +00:00
Uwe Hermann 8c14e45bfd Move probe_superio into the global util/ directory.
Rename it to superiotool while we're at it.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 19:44:36 +00:00
Uwe Hermann bd26392f42 Add support for the ITE IT8708F.
Here's a dump from my test system which has an IT8708F:

No SuperI/O chip found at 0x002e
probing 0x002e, failed (0x87), data returns 0x87
SuperI/O found at 0x2e: id=0x8708, chipver=0x0
ITE IT8708
idx 07 20 21 22 23 24 25 26 27 28 29 2a 2e 2f 
val 02 87 08 00 00 00 00 00 03 01 01 00 00 00 
def NA 87 08 00 00 NA 3f 00 ff ff ff ff 00 00 
switching to LDN 0x0
idx 30 60 61 70 74 f0 f1 
val 01 03 f0 06 02 00 80 
def 00 03 f0 06 02 00 00 
switching to LDN 0x1
idx 30 60 61 70 f0 
val 01 03 f8 04 00 
def 00 03 f8 04 00 
switching to LDN 0x2
idx 30 60 61 70 f0 f1 f2 f3 
val 01 02 f8 03 00 50 01 7f 
def 00 02 f8 03 00 50 00 7f 
switching to LDN 0x3
idx 30 60 61 62 63 64 65 70 74 f0 
val 01 03 78 07 78 00 80 07 03 0b 
def 00 03 78 07 78 00 80 07 03 03 
switching to LDN 0x4
idx e0 e1 e2 e3 e4 e5 e6 e7 f0 f1 f2 f3 f4 f5 f6 
val 80 61 00 00 00 00 00 00 80 00 30 00 80 00 de 
def NA NA 00 00 00 00 00 00 00 00 00 00 00 NA NA 
switching to LDN 0x5
idx 30 60 61 62 63 70 71 f0 
val 01 00 60 00 64 01 02 0c 
def 01 00 60 00 64 01 02 00 
switching to LDN 0x6
idx 30 70 71 f0 
val 01 0c 02 00 
def 00 0c 02 00 
switching to LDN 0x7
idx 70 b0 b1 b2 b3 b4 b5 b8 b9 ba bb bc bd c0 c1 c2 c3 c4 c5 c8 c9 ca cb cc cd d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 da db dc f0 f1 f2 f3 f4 f5 f6 f7 f8 f9 fa fb fc 
val 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 01 01 00 00 00 03 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ff 7f 20 51 00 0e 00 00 00 00 00 00 00 
def 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 NA NA NA NA NA NA 00 00 00 00 00 00 00 00 00 00 00 NA 00 
switching to LDN 0x8
idx 30 60 61 
val 00 02 01 
def 00 02 01 
switching to LDN 0x9
idx 30 60 61 70 f0 
val 00 03 10 0b 06 
def 00 03 10 0b 00 
switching to LDN 0xa
idx 30 60 61 70 f0 
val 00 03 00 0a 40 
def 00 03 00 0a 00 
No SuperI/O chip found at 0x004e
No SuperIO chip found at 0x004e
No SuperIO chip found at 0x004e

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-09-01 19:42:42 +00:00
Uwe Hermann 8a5a264748 Fix typo for the ITE IT8712F (trivial).
The default for LDN 5 (keyboard), index 0xF0 is not 0x00
but rather 0x08 as per datasheet.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2755 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-31 20:51:00 +00:00
Markus Boas 736c1d8618 Add support for the Winbond W29EE011.
Signed-off-by: Markus Boas <ryven@ryven.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30 10:17:50 +00:00
Markus Boas 3b78de6887 Add support for the Winbond W29C040P.
Signed-off-by: Markus Boas <ryven@ryven.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-30 10:11:08 +00:00
Uwe Hermann 6c71f73786 Change all flashrom license headers to use our standard format.
No changes in content of the files.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-29 17:52:32 +00:00
Carl-Daniel Hailfinger b1786c2bce This patch makes ITE Super I/O probing/dumping a little bit more generic,
fixes minor coding style issues and prepares the table for supporting
more chips of the ITE IT87xx Super I/O family.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-28 10:43:57 +00:00
Carl-Daniel Hailfinger 7a7890aced This patch rewrites probe_superio almost completely.
Common code sequences have been factored out, the code has been made
more generic, has better handling of corner cases and is actually much
shorter.

It also adds probing for almost all recent (since 1999) ITE Super I/O
chips to probe_superio. I did verify against all ITE datasheets
(including those not available any more) that the probing was
non-destructive.

For the ITE IT8712F, the complete configuration is dumped and as
comparison the default value from the data sheet is printed.
More information can be extracted easily, however this needs loads of
datasheet surfing.

This code has been tested extensively, dumping for other ITE chips will
follow as a separate patch.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-27 07:28:28 +00:00
Uwe Hermann ba9ce9f7f9 Cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2748 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23 16:08:21 +00:00
Uwe Hermann 0a6bb91062 Drop duplicated code (copies of plain JEDEC functions).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2747 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23 15:20:38 +00:00
Uwe Hermann 2fe239134c Drop a bunch of useless header files, merge them into flash.h.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2746 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23 13:34:59 +00:00
Uwe Hermann 3a9bbc2cc8 Move code into *.c files, there's no reason to have it in header files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-23 10:20:40 +00:00
Ed Swierk 3436698b6a Fix bug in probe_28sf040() causing flash corruption on SST49LF160C verify.
The first byte of the flash chip was read at the start of the function
and later written back to address 0 if the flash chip was not identified
as SST28SF040, which means most of the time. This write caused corruption
of flash contents when verifying a SST49LF160C part.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2744 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-13 04:10:32 +00:00
Luc Verhaegen 4d43255bef flashrom: Add board enable for the EPoX EP-BX3.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2743 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-08-11 16:59:11 +00:00
Uwe Hermann 7ab22686b8 flashrom: Add missing supported flash chips to the README (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-07-27 03:32:45 +00:00
Carl-Daniel Hailfinger ae293d74f9 This patch adds support for the M50FLW040A, M50FLW040B, M50FLW080A,
M50FLW080B, M50FW080, M50FW016, M50LPW116, M29W010B flash chips made
by ST to flashrom.

The patch is based on the data sheets of the chips and has not been
tested at all.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2741 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-07-25 17:55:45 +00:00
Carl-Daniel Hailfinger 3a262082ba This patch adds support for ST M50FW040 and ST M29W040B to flashrom.
Only reading from the chips was tested; writing support is untested.

Thanks to Gürkan Sengün <gurkan@linuks.mine.nu> for testing!

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2740 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-07-24 18:18:05 +00:00
Stefan Reinauer 6540ae5ea0 Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2736 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-07-12 16:35:42 +00:00
Luc Verhaegen 9bcad23ba1 Flashrom: Add support for Tyan Tomcat K7M.
Same board enable as Asus A7V8-MX. Tested by Reinhard Max.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2732 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-07-04 17:51:49 +00:00
Uwe Hermann e29a664b54 Fix up and document the AMD CS5530/CS5530A support in flashrom.
The previous code was pretty unreadable, undocumented and did some totally
unrelated things (such as mucking with the game port or port 0x92).

This version is tested with a 256 KB chip and should work for the
CS5530 and CS5530A.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2715 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-06 21:35:45 +00:00
Uwe Hermann 6602070955 flashrom: Document the newly supported IBM x3455 board and the
now-supported Broadcom HT-1000 chipset (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-05 15:02:18 +00:00
Stefan Reinauer 5e2a42ae32 Move GPIO settings to board specific code for IBM x3455
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-05 12:51:52 +00:00
Stefan Reinauer 444e39ee6d Add support for BCM HT1000 chipset to flashrom. Tested on IBM x3455.
(trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-06-05 10:28:39 +00:00
Uwe Hermann da0eec07fb Minor cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-24 19:17:29 +00:00
Stefan Reinauer 1bccabc16c drop leftover includes (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-24 09:26:39 +00:00
Stefan Reinauer 0c6c4fcaf9 some copyright analysis
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-24 09:08:36 +00:00
Stefan Reinauer 8924fdd22b factor out register mapping code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-24 08:48:10 +00:00
Stefan Reinauer a18501dae8 Unify mmap error messages in flashrom (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-23 18:24:58 +00:00
Stefan Reinauer f8eea5cd1c big cosmetic offensive on flashrom. (trivial)
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
  so they dont mess up the initializer.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-23 17:20:56 +00:00
Uwe Hermann f8953dc095 Add support for the Winbond W39V040FA chip.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-21 21:39:08 +00:00
Stefan Reinauer c141282193 fix lbtdump after last checkin. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-20 17:28:55 +00:00
Ben Hewson 917bf6b99e Here is a small fix to prevent a segmentation fault in lbtdump.
The format specifier in the printf statements have been changed from
%08lx to %08llx or similar where uint64_t are being displayed.

Signed-off-by: Ben Hewson <ben@hewson-venieri.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-20 17:10:17 +00:00
Luc Verhaegen a56b998796 Flashrom: add support for ASUS P5A (Socket 7, ALi based).
* Add support for the ALi M1533 to chipset_enable.c
* Add some SMBus poking needed for the ASUS P5A, to board_enable.c

Since PCI subsystem IDs are worthless with this board, people will
have to name the board directly.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-20 16:16:13 +00:00
Uwe Hermann c7dc7cc196 Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]

Some minor fixups were required, and maybe a few more cosmetic
changeѕ are needed.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-09 10:17:44 +00:00
Luc Verhaegen 5941c25fe8 Add WinBond Super IO helpers.
* These helpers severely clear up winbond superio usage.
* Removed board_iwill_dk8_htx as it can be replaced by
  board_agami_aruma (Mondrian Nuessle).
* Renamed board_agami_aruma to w83627hf_gpio24_raise.
* Clarified comments in w83627hf_gpio24_raise, and added
  some things from the old iwill code.
* Moved all board functions name argument to const.
  (warning breaks build)
* Moved iwill entry in board_pciid_enables.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-04 04:47:04 +00:00
Mondrian Nuessle 24c9612490 Enable flashing on the IWILL DK8-HTX board by configuring the Super I/O
to set the right GPIO pins, so write protection is disabled.

Signed-off-by: Mondrian Nuessle <nuessle@uni-mannheim.de>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-05-03 10:09:23 +00:00
Uwe Hermann 7580f87f7a Add initial support for the following flash chips:
- Atmel AT29C020
 - STMicroelectronics M29F002B
 - STMicroelectronics M29F002T
 - STMicroelectronics M29F002NT

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Roger Zauner <roger@eskimo.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-28 02:22:59 +00:00
Uwe Hermann dabbf5777b Revert the image size increasing for abuild. It breaks more boards than
it fixes. It seems many of the other boards run out of space for the
payload.

Thus, this patch only increases the image size for the three boards

 - tyan/s2912
 - nvidia/l1_2pvv
 - gigabyte/m57sli

by adding a custom Config-abuild.lb file for each of them.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-25 00:23:39 +00:00
Uwe Hermann f83c182638 Increase image size for abuild. This should fix the build of these boards:
- tyan/s2912
 - nvidia/l1_2pvv
 - gigabyte/m57sli

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-24 21:54:21 +00:00
Uwe Hermann 6f278ad828 Use __PAYLOAD__ instead of PAYLOAD as replacement template for abuild.
Comment out code which currently doesn't compile. Needs fixing later.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-22 19:03:34 +00:00
Uwe Hermann a94b4c6bc1 Update URL for the PCI IRQ Routing Table Specification (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-22 01:17:36 +00:00
Uwe Hermann 29800b76ee Make the output of getpir look a bit less crappy (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-21 18:17:50 +00:00
Stefan Reinauer f1291cfdfc Exit on return code of read_layout and print error message to stderr
instead of stdout (trivial)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-14 16:32:59 +00:00
Stefan Reinauer f43cb68606 Trivial patch: Make buildrom a little bit more verbose.
It shows the remaining space in an image now.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-11 23:36:02 +00:00
Uwe Hermann 78b5e37e8c Rename flash_rom.c to flashrom.c. The tool is called 'flashrom' after
all.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-11 23:31:45 +00:00
Jeremy Jackson 46d65e85a1 Jeremy Jackson wrote:
I'm guessing nobody has tried compiling it with 64bit userspace?

Patch makes it compile cleanly and stops a "SEGV instead of working"
issue.

I also added a few checks for errors on system calls.

Signed-off-by: Jeremy Jackson <jerj@coplanar.net>

Reworked and
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-11 18:44:42 +00:00
Uwe Hermann 4880353e03 flashrom: Add VIA CX700 to the list of supported southbridges (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-09 22:59:22 +00:00
Randall Philipson 4e5cc9dcd0 add support for CX700 builtin southbridge
Signed-off-by: Randall Philipson <rtphilipson@cox.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-09 22:27:45 +00:00
Stefan Reinauer 24cc7bf436 increase image size for abuild (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-07 13:27:14 +00:00
Stefan Reinauer ba43064d32 Trivial patch:
* Drop empty file (0 bytes) northbridge/amd/amdk8/cpu_rev.c
  and references to it.
* move config option decision to preprocessor instead of code
  since config options can not change during runtime
* slightly more verbose output in built_opt_tbl.c

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-06 12:14:51 +00:00
Stefan Reinauer 03cafbfdfe Trivial (cosmetic) cleanup:
* Only open /dev/mem once and do it early.
* Drop extern for function prototypes.
* Minimize ts5300 impact in probe_flash()

This cleanup will making ICH7 SPI support quite some easier.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-06 11:58:03 +00:00
Luc Verhaegen b8c6437811 flashrom: split flash_enable.c into chipset_enable.c and board_enable.c
This splits up the ROM Write enable code into chipset specific and
board specific parts. This of course means that a lot of code is
plainly moved about.

* Allows for linuxbios name matching and pci-subsystem id matching.
  The latter uses a double set to properly distuinguish boards despite
  of some known vendors being lax about it.
* Fixes GPIO15 being raised on every VT8235 southbridge, regardless of what
  that line actually controls; rom on EPIA-M, backlight on mitac 8999 laptop.
* Adds flashrom support for Asus A7V400-MX (KM400 + VT8235)
* Island aruma was renamed agami aruma, the board specific code now got
  adjusted. A set of pci-ids was retrieved from source code.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-04 22:45:58 +00:00
Uwe Hermann cbef76ecf3 Drop useless and partly even incorrect comments (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-01 20:00:32 +00:00
Uwe Hermann 195237f2e1 Coding style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-04-01 19:44:21 +00:00
Uwe Hermann 0d9d0bae8a Flashrom: Add support for the ICH7-DH southbridge (untested).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-03-31 19:48:38 +00:00
Stefan Reinauer 5445639f06 This is a trivial cosmetic fix. Without it, the error message might look like:
Image size doesnt match: Success

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2573 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-03-22 14:51:45 +00:00
Ed Swierk 681d7887f4 The attached patch adds additional PCI IDs for MCP55 LPC devices to
flashrom. 0x0360 is needed to support the DFI LANParty NF590SLI, and I
am deducing the others based on pci_ids.h in the Linux kernel.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-03-06 23:49:49 +00:00
Luc Verhaegen 47ce57acd7 flashrom: Fix wrong VT8235 flash enable failed warning.
* Fix harmless but worrying warning where the return value of
  pci_write_byte is misinterpreted.
* Hash together VT8231 and VT8235 code into VT823x. VT8231 is the better
  implementation, but lacked the write protect disable code that's
  apparently needed for VT8235.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2568 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-03-02 22:16:38 +00:00
David Hendricks 53b9c1e798 Add Winbond W39V080A support to Flashrom.
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-03-02 02:25:36 +00:00
Ward Vandewege 811f5c10ee Add support for the Gigabyte m57sli-s4 board to flashrom.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-28 21:50:15 +00:00
Ed Swierk 3ecf5002b3 Currently the flashrom Makefile tries to detect whether pciutils-devel
is installed, but the test also fails if zlib-devel is missing. This
patch changes the error message accordingly.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2553 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-16 14:36:12 +00:00
Uwe Hermann 4020dd5ac5 Include src/include/boot/linuxbios_tables.h in the flashrom source
tree to make it compilable independant of the LinuxBIOS source code.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-02-06 19:53:51 +00:00