Commit Graph

1313 Commits

Author SHA1 Message Date
Julius Werner f38a10f8d2 libpayload: Add SKU ID coreboot table support
This patch adds support to read the SKU ID entry from the coreboot table
that was recently added in coreboot.

Change-Id: I1c3b375da6119a4f8e8e7e25a11644becb90f927
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/22743
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-07 01:19:38 +00:00
Julius Werner 2e029ac6a6 libpayload: Minor board ID / RAM code cleanups
This patch mirrors recent cleanups in coreboot regarding the strapping
ID entries in the coreboot table.

Change-Id: Ia5c3728daf2cb317f8e2bc72c6f1714d6cb4d080
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/22742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-12-07 01:18:30 +00:00
Jonathan Neuschäfer b077b91e60 payloads/external: Use stable version of GRUB2 by default
Using the stable version by default is consistent with
payloads/external/SeaBIOS.

Change-Id: I444ba2daaf5ecc5edde907a7842013f88e1c4c9b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/22528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-30 17:48:31 +00:00
Jonathan Neuschäfer 2eb95f3db9 payloads/external: Add a stable version of GRUB2
This should make reproducible builds of coreboot with GRUB2 easier.

Change-Id: If855042945ab34f34c554e7490c811ec7b256980
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/22527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-30 17:48:22 +00:00
Martin Kepplinger eb72207fee payloads/seabios: Update stable from 1.10.3 to 1.11.0
SeaBIOS 1.11.0 was released on November 10th, 2017. Changes include

* Initial support for NVME drives
* Support for vga emulation over a serial port in SeaBIOS (sercon)
* Support for serial debugging using MMIO based serial ports
* Support for scsi devices with multiple LUNs
* Support for boot-to-boot persistent coreboot cbmem logs
* Improved coreboot vga (cbvga) mode setting compatibility
* Several bug fixes and code cleanups

See also https://www.seabios.org/Releases#SeaBIOS_1.11.0 and for all
details on the changes, use
  git log --oneline rel-1.10.3..rel-1.11.0
in the SeaBIOS repository.

Change-Id: Ie46a526593177c5241fbd979c7fa1934478f7382
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/22429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Vasya Boytsov <vasiliy.boytsov@phystech.edu>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-11-28 18:00:41 +00:00
Martin Kepplinger 677d261519 payloads/seabios: Update stable from 1.10.2 to 1.10.3
SeaBIOS 1.10.3 was tagged on October 12th, 2017 with the following
changes.

```
$ git log --oneline rel-1.10.2..rel-1.10.3
b7661dd tcgbios: Fix use of unitialized variable
6055583 boot: Increase description size in boot menu
3551613 resume: Don't attempt to use generic reboot mechanisms on QEMU
```

Change-Id: I3a9ebf10a55118fc35aed688ea7ec794333c8227
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/22358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-11-08 15:25:19 +00:00
Julius Werner 59e9080dcb endian: Fix bebitenc() to actually encode big-endian
bebitenc() just runs a downward loop over the same body as lebitenc().
That doesn't give you a byte-swapped result, it gives you the same final
value, just starting from the other side to fill it in. (Also, it
confused i++ and i--, so it really gives you a compiler error.)

The correct code needs to have the array index inverted relative to the
bit shift index to produce a big endian result.

Change-Id: I5c2da3a196334844ce23468bd0124bbe2f378c46
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/22322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-06 20:46:37 +00:00
Ronald G. Minnich 8db7f8bad7 LB_TAGS: change the value of CB_TAG_MAC_ADDRS to 0x33
When building the Go version of cbmem I found that
LB_TAG_MAC_ADDRS has the same value as LB_TAG_VERSION_TIMESTAMP.

I am guessing that this tag was little used. In any event, move it
forward to 0x33.

Change-Id: I038ad68e787e56903a2ed9cb530809a55821c313
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/22218
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-10-29 18:07:51 +00:00
Jonathan Neuschäfer a1c42cca00 payloads/external: Clone GRUB2 over HTTPS
Since the git:// protocol is unencrypted and unauthenticated, there's a
security risk associated with using it: A man-in-the-middle attacker
could replace e.g. the master branch with malicious code.

Mitigate this risk somewhat by cloning GRUB2 via HTTPS.

Change-Id: Ice8f8d108e7dfa1a1ecd58d9735944fa9570ace8
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/21344
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-09-16 22:33:29 +00:00
Daisuke Nojiri c6dcdbfe19 Update vboot submodule to upstream master
Updating from commit id 3f3a496a 2017-09-01 09:20:19
(image_signing: Fix loem.ini pattern for unibuilds)

to commit id 753e34e9 2017-08-31 10:12:40
(futility: Make rwsig sign command produce EC_RW image)

This brings in 5 new commits.

This also updates Depthcharge stable commit ID.

Updating from a843f262 2016-08-16 08:41:04
(kahlee: select emmc boot first if available)

to commit id f3bb31fe 2017-08-15 17:15:33
(vboot: Support EC early firmware selection)

This brings in 14 new commits.

Change-Id: I17d034e87fa642c5e30e933eb98bcfe5ceaaa3a8
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://review.coreboot.org/21490
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-13 02:24:37 +00:00
Martin Roth 2d1e0eb8a7 payloads/coreinfo: Free buffer before returning
Fixes coverity issue 1373370 - Resource leak

Change-Id: I71e0d3ae7f9152e1f89f8b3206526f0d344e0351
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2017-09-11 16:23:52 +00:00
Nicola Corna 33f1273f9f tint: Use the current time as random seed
Previously the random seed was fixed, which led to the same sequence of
blocks for each run.

Now that libpayload has time(), no change is needed in the function
rand_init() of tint.

Change-Id: I2e482bbb9d33cdbbf3c15916458329f99fbc4450
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/20980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-09-06 11:53:57 +00:00
Nico Huber 3f43edc351 libpayload/storage: Add Sunrise Point AHCI PCI id
Change-Id: I9645d76d05014722e4ae0c398d82f7f8e34d6f1c
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/21289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-09-02 15:33:50 +00:00
Martin Roth 89942a5aa7 Update depthcharge stable to upstream master
Updating from commit id 5a086f5c - Tue Jul 11 23:57:30 2017:
(ps8751: enable software sync.)

to commit id a843f262 - Wed Aug 16 23:37:52 2017:
(kahlee: select emmc boot first if available)

This brings in 20 new commits.

This matches with the updated vboot submodule.

Change-Id: If030bc3e75dd470838590540880213bd841154b8
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-08-23 16:33:05 +00:00
Nicola Corna b016f144cc libpayload: add time()
Change-Id: I97e393537ccc71ea454bb0d6cdbbb7ed32485f1e
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/21011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-21 16:53:20 +00:00
Nico Huber 4ff449272d payloads/external/GRUB2: Only rebuild on config changes
Change-Id: I376eea9a3e02b03010fc5c5a05199ea7b2813220
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-20 20:46:25 +00:00
Arthur Heymans 85a90e1207 payload/tianocore: Add patch to preserve coreboot table
Credit for this patch goes to 'ReddestDream'.

The patch is pulled from https://github.com/MattDevo/edk2

TESTED on thinkpad X200.

Change-Id: I1517607cee8308c5f5443c58c16ce44056611e92
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20968
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-08-18 15:23:53 +00:00
Nico Huber 40b2ae3ff8 payloads/Makefile.inc: Add GRUB2 to list of payloads
Change-Id: Iea4a609631ac2007b7b1845ff540abc912004be0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20992
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-08-15 14:26:29 +00:00
Nico Huber a2ab1fd0ff payloads/external/GRUB2: Sanitize Makefile
We were explicitly passing CC and TARGET_CC to configure but overwrote
that decision later by passing CC (with the value of TARGET_CC) directly
to a recursive make call. The latter overwrite was introduced because
`unexport` alone doesn't work on variables that were specified on a make
command line (they are added to MAKEOVERRIDES and passed to further re-
cursive make calls).

Instead of unexporting random variables, unexport those that were actu-
ally passed from payloads/external/Makefile.inc and clear MAKEOVERRIDES.
Do not pass OBJDUMP as that is nowhere to be found in the GRUB sources.
And, last but not least, add --disable-werror because building GRUB is
very susceptible to changes in the flex version.

Change-Id: Iaff2c72e89a5a540fe365eacb84811d5cff9d4d4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-15 14:22:51 +00:00
Caveh Jalali 673e014fab libpayload: add *SECS_PER_SEC macros to stddef.h
this adds convenience definitions for MSECS_PER_SEC, USECS_PER_MSEC,
and USECS_PER_SEC along the lines of the time units in coreboot's
<timer.h>.

Change-Id: I489dc2d1ff55d137936acec74ac875dc7fbc1713
Signed-off-by: Caveh Jalali <caveh@google.com>
Reviewed-on: https://review.coreboot.org/20882
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-08-14 18:06:33 +00:00
Evelyn Huang 285f9f2fe3 payloads/external/tianocore: Add and apply patches for tianocore
Create a directory patches, and add necessary patches to be applied to
upstream tianocore.

Patches include:
-Patch for no PCI address enumeration
-Patches to enable keyboard input
-Patch to disable serial to speed up boot process.

Patches pulled from https://github.com/MattDevo/edk2.

Additionally, modify tianocore Makefile to apply patches during build.

Change-Id: I4eaa602418995a68753b1ed13af8c6374eaa312f
Signed-off-by: Evelyn Huang <evhuang@google.com>
Reviewed-on: https://review.coreboot.org/20639
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-11 15:40:31 +00:00
Martin Roth 6c9c196f1c copy & update test routines from what-jenkins-does
Currently the only testing we had was 'what-jenkins-does' and
'make lint'. While the lint testing is suitable for developers,
the 'what-jenkins-does' target really isn't, as it was designed
specifically for testing on jenkins.

This adds the infrastructure for basic tests that are more suitable
for the developer. Extended tests and improvements will follow.

Add the coreboot-builds directories to .gitignore.

TODO:
- Save/restore .config
- Update test-abuild to use existing COREBOOT_BUILD_DIR variable

Change-Id: I19e1256d79531112ff84e47a307f55791533806f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Chris Ching <chingcodes@google.com>
2017-08-11 15:24:56 +00:00
Nico Huber abc69cd001 libpayload/libpci: Add a constant for PCI class memory other
Change-Id: I71e902c4ec843608c1518fe1e8b90fbcf98a13d1
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20930
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-08-10 16:41:16 +00:00
Martin Roth 4769cc3c0c payloads/external/tianocore: build UEFI payload
Update the existing tianocore payload (which didn't do any more than
adding an elf payload with a specific name) to fetch and build the
UEFI corebootPayloadPackage, using the coreboot toolchain for
compilation. Only checkout the commit when changing commit IDs or if
version is master, instead of every time it builds.

Currently working if patches are merged into the upstream edk2
repository (to be included in a follow-on patch).

Change-Id: I0bf4cedec2d6821ae2a04184ebb5cf88979ccee3
Signed-off-by: Martin Roth <martinroth@google.com>
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Signed-off-by: Evelyn Huang <evhuang@google.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/15057
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-08-10 15:54:08 +00:00
Paul Menzel 12a3fbdb7e libpayload: Use a static copy of `font_glyph_filled()`
libpayload needs a static copy of the out of line function
`font_glyph_filled()` in every TU that needs it. So make it static
inline.

This fixes a build error by gcc (Debian 7.1.0-12) 7.1.0 from Debian
Sid/unstable. This happens with any libpayload based payload like
coreinfo, nvramcui or tint.

```
[…]
    LPCC       build/coreinfo.elf (LINK)
/src/coreboot/payloads/coreinfo/build/libpayload/bin/../lib/libpayload.a(corebootfb.libc.o): In function `corebootfb_putchar':
/src/coreboot/payloads/libpayload/drivers/video/corebootfb.c:173: undefined reference to `font_glyph_filled'
[…]
```

Change-Id: I931f0f17b33abafdc49aa755a0dad65e28820750
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/20897
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-08-10 12:07:13 +00:00
Caveh Jalali 0068a9f579 add __must_check to */compiler.h
the __must_check function attribute is pretty much straight from the
linux kernel - used to encourage callers to consume function return
values.

Change-Id: I1812d957b745d6bebe2a8d34a9c4862316aa8530
Signed-off-by: Caveh Jalali <caveh@google.com>
Reviewed-on: https://review.coreboot.org/20881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-08-08 18:18:03 +00:00
Paul Kocialkowski d85e485c58 libpayload: video: Add support for font scaling with a factor
This introduces support for font scaling with a factor provided via
Kconfig. In practice, the font itself is not scaled at any point in
memory and only the logic to determine whether a pixel should be filled
or not is changed.

Thus, it should not significantly impact either the access time or
memory use.

Change-Id: Idff210617c9ec08c6034aef107cfdb34c7cdf029
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/20709
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-08-03 20:37:07 +00:00
Paul Kocialkowski 1c0b603673 libpayload: video: Introduce helpers for font access
This introduces helpers for accessing the included font, instead of
using hardcoded values provided by the font's header itself.

It will allow painlessly adding support for font scaling in a subsequent
change. It should not introduce any functionality change.

Change-Id: I0277984ec01f49dc51bfc8237ef806f13e3547e2
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/20708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-08-03 20:34:59 +00:00
Ricardo Ribalda Delgado ff1477911e libpayload: Double HEAP_SIZE in default config
Bettong board with the standard configuration is not capable of
running nvramui with the default size.

malloc error happens on PDC_makelines(). Resulting in:

Booting from CBFS...
Run img/nvramcui
Calling addr 0x00100000
initscr(): Unable to create stdscr.
exited with status 1

Change-Id: I56a0fb3319fe77599bf3dd6c328a0b70be60a348
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: https://review.coreboot.org/20681
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-07-28 16:17:04 +00:00
Nico Huber 1a4add9e87 libpayload/storage: Replace 1s AHCI reset delay with a timeout
AHCI spec explicitly states that we may poll.

TEST=Ran FILO on kontron/bsl6 and observed that the controller
     always becomes ready during the first delay.

Change-Id: If34694abff14d719d10d89bc6771dbfa12065071
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-27 13:56:53 +00:00
Nico Huber a67dd9de77 libpayload/storage: Enable bus mastering for AHCI
This is (thankfully) not done by coreboot any more for recent chipsets.

Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-27 13:56:45 +00:00
Nico Huber 50ab84fa37 libpayload: Clean up unaligned memset() support
Use a `for` instead of a `while` loop and use meaningful identifiers.
Also, don't use more than one variable for one and the same purpose,
don't use more (non-const) variables than necessary, don't alter more
than one variable per statement, don't compare pointers of different
types and don't do pointer arithmetic on `void *`.

This was meant as a fix up to a regression but that has already been
fixed.

Change-Id: I0c8fd118d127a26cfcf68bfb0bf681495821e80a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20750
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-07-26 19:34:02 +00:00
Nico Huber c5362029e1 payloads/depthcharge: Fix clean target
This line has a weird history. It got a `|| exit 0` removed lately which
obviously was there to fix the presence of the superfluous `test` at the
beginning. Now, remove the `test` too to make the clean target always
succeed again ;)

Change-Id: I9e069cf5d9ac8416cf350161439aa60798ef7b6b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20769
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-07-26 19:30:59 +00:00
Martin Roth 5bb5307c7d depthcharge: Update build
- Add prompt so the defconfig can be selected for the build.
- Remove target rename code from makefile.  The old versions don't build
with the latest vboot, so this isn't useful anymore.
- Change $(info ...) to an echo.  info prints immediately when
evaluated, which made it print when it shouldn't have, on make clean
for example.
- Split up single line shell scripts into multiple lines
- Change checkout target to only update the commit id when actually
changing versions instead of on every build.

Change-Id: I46fc2822cf93c821b402e8961ceecedc088f486c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20667
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-23 20:17:45 +00:00
Martin Roth f02171efc6 depthcharge: Update stable commit id
Update from commit eb583fa8 - Wed Mar 29, 2017
(rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz)

to commit 5a086f5c - Tue Jul 11, 2017
(ps8751: enable software sync)

This brings the stable version of depthcharge forward by 74 commits.

Change-Id: I3a3719fa3a91824042d452de7774be85b884d96d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2017-07-23 20:17:27 +00:00
Marshall Dawson 148a7a60d8 libpayload: Fix unaligned buffer logic in default_memset
Fix an issue when setting an unaligned buffer where n is less
than the difference of the rounded up pointer and the pointer.
This was identified where n=1 was passed.  n was decremented
once, as expected, then decremented again after the while()
evaluated to false.  This resulted in a new n of 4GB.

Change-Id: I862671bbe7efa8d370d0148e22ea55407e260053
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/20655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-07-20 21:38:14 +00:00
Stefan Reinauer 6a00113de8 Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))

Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-13 19:45:59 +00:00
Jeremy Compostella 5b8987ae46 libpayload: Support unaligned pointer for memcpy, memmove and memcmp
The memcpy(), memmove() and memcmp() functions use word by word
operations regardless of the pointer alignment.  Depending on the
platform, this could lead to a crash.

This patch makes the memcpy(), memmove() or memcmp() operate byte per
byte if they are supplied with unaligned pointers.

Change-Id: I0b668739b7b58d47266f10f2dff2dc9cbf38577e
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/20535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-07-13 18:16:15 +00:00
Jeremy Compostella 54db255529 libpayload: Support unaligned pointers for memset
The optimization of the memset() function introduced by commit
dbadb1dd63 (libpayload: Reorder default
memcpy, speed up memset and memcmp) is provoking an issue on x86
platform when compiling without the CONFIG_GPL option.

GCC is making use of the movdqa instruction to copy words.  This
instruction can raise a "General Protection Fault Exception" when it
is called on a non-aligned address argument.

Change-Id: I73382a76a4399d8e78244867f2ebb1dca176a6bf
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/20524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-07-12 10:58:55 +00:00
Patrick Rudolph 837da6ade7 libpayload: Add mouse cursor driver
Add a driver to handle multiple low level mouse drivers
and provide basic cursor acceleration support.

Tested on Lenovo T500.

Change-Id: Ib7cec736631b8acf81a14d28daa29ff720777b10
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18593
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-28 00:56:53 +00:00
Elyes HAOUAS 70083a1de9 payloads: Add whitespace around '<<'
Change-Id: I0659f6ec59fb808b4cedf57d60d737c13c250042
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20396
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-28 00:23:18 +00:00
Elyes HAOUAS 7c4a8e57dc libpayload/drivers/usb/ehci_private.h: Add brackets around macro
Change-Id: Iee8dc03d5a4ca7537c7da4fed2c67b169c9e2422
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27 19:43:22 +00:00
Elyes HAOUAS 47916fbef2 libpayload/drivers/usb/xhci_private.h: Add parentheses around macro
Change-Id: I0347594e9480dedc4845b6863733a67fc5e47e1c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20371
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-27 19:43:15 +00:00
Nicola Corna 71693ba43f coreinfo: Use regular `if` over `#if` for `IS_ENABLED`
When using the regular `if` construct, the compiler will check
the guarded code independently from the condition.

Change-Id: I00c5c7ae3720f75aa9415edb94cd2ce76cee8aee
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-27 17:16:03 +00:00
Elyes HAOUAS b09822cf82 libpayload/drivers/usb/ohci_private.h: Add brackets around macro
Change-Id: Id4892adba161cd08eecde71a011384b6c465b98f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20372
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-06-27 16:51:30 +00:00
Duncan Laurie 98409cff92 libpayload: corebootfb: Add null check for framebuffer address
If the framebuffer address is zero the corebootfb_init() function
should abort and not attempt to use it for video, otherwise it
will likely hang.

This was tested by booting on a board that does not have a display
attached and includes the previous patch to zero the framebuffer
structure in the coreboot tables.

Change-Id: I53ca2e947a7915cebb31b51e11ac6c310d9d6c55
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/20368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-27 02:16:10 +00:00
Lee Leahy 6796d787c5 libpayload: Enable building libpayload with march=i586
Add a Kconfig value to enable building libpayload with the 586 compiler.
Update the cross compiler script to add the Kconfig value name that is
used when libpayload builds.

The Quark SOC does not support some of the instructions generated with
the 686 compiler (e.g. CMOV).  Success occurs when
payloads/libpayload/build/config.h indicates that
CONFIG_LP_USE_MARCH_586=1.

TEST=Build and run on Galileo Gen2.

Change-Id: I04907e9a38ee139bae2e8b227821f54614707c25
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-26 23:14:05 +00:00
Lee Leahy 82890928d3 libpayload/configs: Add configuration for Galileo
Add the default configuration file for the Galileo board.  The Quark SOC
requires building libpayload with march=i586.

TEST=Build and run on Galileo Gen2

Change-Id: Ifd4b533feacbab6f0d357e13d8cebb64bc1c18c6
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-26 15:32:17 +00:00
Nico Huber 9121a364a6 payloads/Kconfig: Add NO_DEFAULT_PAYLOAD
This symbol can be selected (e.g. in site-local/) to disable the user
friendly but annoying default payload choice.

Change-Id: I2f72d4efc0a428dce377c3d003b2c00a6c8d4c08
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19808
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-07 13:10:48 +02:00
Martin Roth e81ce0483d payloads: change coreboot to lowercase
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.

Change-Id: I2ec18ca55e0ea672343a951ab81a24a5630f45fd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-06-07 12:08:55 +02:00
Paul Menzel 59e2113670 Use www.coreboot.org over coreboot.org
<https://coreboot.org> is redirected to <https://www.coreboot.org>.

```
$ curl -I https://coreboot.org
HTTP/1.1 301 Moved Permanently
Server: nginx/1.8.1
Date: Mon, 05 Jun 2017 10:41:33 GMT
Content-Type: text/html
Content-Length: 184
Connection: keep-alive
Location: https://www.coreboot.org/

```

So use the command below to use the final location to save a redirect.

```
$ git grep -l https://coreboot.org \
| xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g'
```

Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20035
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:05:44 +02:00
Paul Menzel a8843dee58 Use more secure HTTPS URLs for coreboot sites
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:04:50 +02:00
Paul Menzel afbc2c9c0c nvramcui: Use regular `if` over `#if` for `IS_ENABLED`
When using the regular `if` construct, the compiler will check the
guarded code independently from the condition.

Change-Id: I988fa9379e8c748013a67ef29fa908b4d9a970ad
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/18794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 23:34:19 +02:00
Nico Huber 6d8266b91d Kconfig: Add choice of framebuffer mode
Rename `FRAMEBUFFER_KEEP_VESA_MODE` to `LINEAR_FRAMEBUFFER` and put
it together with new `VGA_TEXT_FRAMEBUFFER` into a choice. There are
two versions of `LINEAR_FRAMEBUFFER` that differ only in the prompt
and help text (one for `HAVE_VBE_LINEAR_FRAMEBUFFER` and one for
`HAVE_LINEAR_FRAMEBUFFER`). Due to `kconfig_lint` we have to model
that with additional symbols.

Change-Id: I9144351491a14d9bb5e650c14933b646bc83fab0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-06-04 18:47:19 +02:00
Julius Werner baa3e70084 arm64: Align cache maintenance code with libpayload and ARM32
coreboot and libpayload currently use completely different code to
perform a full cache flush on ARM64, with even different function names.
The libpayload code is closely inspired by the ARM32 version, so for the
sake of overall consistency let's sync coreboot to that. Also align a
few other cache management details to work the same way as the
corresponding ARM32 parts (such as only flushing but not invalidating
the data cache after loading a new stage, which may have a small
performance benefit).

Change-Id: I9e05b425eeeaa27a447b37f98c0928fed3f74340
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-30 22:17:57 +02:00
Shelley Chen d635506fa7 detachables: Add invert parameter
Instead of storing inverted-colored bitmaps,
invert drawing of text bitmap on the fly by adding
an invert parameter down to libpayload.  Merging
pivot and invert fields into flags field.

BUG=b:35585623
BRANCH=None
TEST=Make sure compiles successfully
CQ-DEPEND=CL:506453

Change-Id: Ide6893a26f19eb2490377d4d53366ad145a9e6e3
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/19698
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-05-25 18:23:56 +02:00
Nickey Yang d0e465456e cbgfx: Add portrait screen support
cbgfx currently does not support portrait screen which height >width.
so add it.

Change-Id: I66fee6d73654e736a2db4a3d191f030c52a23e0d
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Reviewed-on: https://review.coreboot.org/19474
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-05-01 17:52:12 +02:00
Patrick Georgi c854e943e0 libpayload/gdb: fix unused variable warning
input_underrun is defined but not used. A reasonably new compiler,
enabled warnings and warnings-as-error make the build break for no good
reason.

Change-Id: Ibeb7ba53aad5738938093ab7b34695c9c99c9afe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/19482
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2017-04-29 07:34:08 +02:00
Julius Werner d67c6876b5 Turn CBMEM console into a ring buffer that can persist across reboots
This patch allows the CBMEM console to persist across reboots, which
should greatly help post factum debugging of issues involving multiple
reboots. In order to prevent the console from filling up, it will
instead operate as a ring buffer that continues to evict the oldest
lines once full. (This means that if even a single boot doesn't fit into
the buffer, we will now drop the oldest lines whereas previous code
would've dropped the newest lines instead.)

The console control structure is modified in a sorta
backwards-compatible way, so that new readers can continue to work with
old console buffers and vice versa. When an old reader reads a new
buffer that has already once overflowed (i.e. is operating in true ring
buffer mode) it will print lines out of order, but it will at least
still print out the whole console content and not do any illegal memory
accesses (assuming it correctly implemented cursor overflow as it was
already possible before this patch).

BUG=chromium:651966
TEST=Rebooted and confirmed output repeatedly on a Kevin and a Falco.
Also confirmed correct behavior across suspend/resume for the latter.

Change-Id: Ifcbf59d58e1ad20995b98d111c4647281fbb45ff
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18301
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-20 00:29:07 +02:00
Furquan Shaikh 342f5f836c libpayload/libc/console: Flush input driver buffer on init
When console input driver registers itself, perform flush of input
buffer to avoid interpreting any stale key presses before libpayload
is run.

keyboard.c: Remove the redundant buffer flush.
8250.c: Ensure that serial_hardware_is_present is set before call to
add input driver.

BUG=b:37273808
TEST=Verified that any key presses in serial console before payload is
up do not have any effect after the payload starts running.

Change-Id: I46f1b6715ccf6418f5b2c741bf90db2ece26a60d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/19345
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-19 19:19:56 +02:00
Julius Werner 7b58319e9c libpayload: cbgfx: Show square images on portrait displays
CBGFX currently doesn't support portrait screens at all. This will have
to be fixed eventually but might take a bit of effort. As a first step
to make devices with a portrait panel somewhat usable, this patch will
just force a square canvas on these panels and keep the bottom part of
the screen black.

Also switch set_pixel to calculate framebuffer position via
bytes_per_line instead of x_resolution. This is supposed to be the
canonical way to do that and may differ in cases where the display
controller requires a certain alignment from framebuffer lines.

Change-Id: I47dd3bf95ab8a7d8b7e1913e0ddab346eedd46f1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19279
Tested-by: build bot (Jenkins)
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2017-04-17 18:12:02 +02:00
Paul Menzel 1560fbf6d6 payloads/seabios: Update stable from 1.10.1 to 1.10.2
SeaBIOS 1.10.2 was released on February 28th, 2017 [1][2] with the
changes below.

```
$ git log --oneline rel-1.10.1..rel-1.10.2
5f4c7b1 QEMU fw_cfg: Write fw_cfg back on S3 resume
c45ca70 QEMU fw_cfg: Add functions for accessing files by key
31b6229 QEMU fw_cfg: Add command to write back address of file
aa7219d romfile-loader: Switch to using named structs
2a1d88c QEMU DMA: Add DMA write capability
d2ac564 ps2port: Disable keyboard/mouse prior to resetting ps2 controller
b0e3c67 vgasrc: Increase debug level
ca3ab93 ahci: Set upper 32-bit registers to zero
```

This fixes the problem on a Lenovo X60, that the keyboard is not
initialized by SeaBIOS when for example loaded from GRUB.

[1] https://www.seabios.org/Releases#SeaBIOS_1.10.2

Change-Id: Idc078ffa896b2e105faabd2d8befeaf9a2a0b6ac
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19290
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-17 17:20:42 +02:00
Martin Roth 973104ba1f payloads/external/depthcharge: Update stable commit id
Update from commit 124af94f - Fri Feb 26, 2016
(skylake boards: unconditionally re-enable 8254 PIT for legacy)

To commit eb583fa8 - Wed Mar 29, 2017
(rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz)

This brings the stable version of depthcharge forward by 325 commits.

Change-Id: I31b3235df6d36409ff1b365e6adb6852281df097
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19220
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14 16:28:22 +02:00
Martin Roth 1a693958eb payloads/external/iPXE: Update stable version
Update from commit 2afd66eb - Fri Jul 29, 2016
([pixbuf] Enable PNG format by default)

To commit fd6d1f46 -  Fri Mar 31, 2017
([thunderx] Use ThunderxConfigProtocol to obtain board configuration)

This moves the stable iPXE commit forward 144 commits.

Change-Id: Ia0c97f863be39632c9206ca95b3857047fc37e26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19221
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14 16:27:42 +02:00
Paul Kocialkowski 038818f00c libpayload: Add gru config
This adds a gru libpayload config, that should fit all gru-based
devices such as kevin.

As gru-based devices are CrOS devices, select the associated config
to enable CrOS-specific features.

Change-Id: I6e79b763fc497c126612b8786a669a33b57ea29f
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/19137
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-04-07 21:33:19 +02:00
Nicola Corna 85e81dfa6d tint: Add USB support
Enable the USB during the initialization of tint. Without it USB
keyboards don't work, which makes this payload pointless on
systems where a PS/2 keyboard port isn't available.

Based on I98f0ccdb19d6b195572941cf87ce3221f57db7c5 (tint and
nvramcui: enable USB, update tint to 0.04+nmu1 with changes) [1]

[1] https://review.coreboot.org/17507/

Change-Id: Iaa8dfac0301ef19a2d76a0975d025b00e7f3807b
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18766
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-19 21:38:22 +01:00
Julius Werner 5fae829410 libpayload: usbhub: Force enumeration of all connected ports on init
We have found a non-compliant USB hub (RealTek RTS 5413) that does not
set a port's Connect Status Change bit on its USB 3.0 half if the port
had already been connected while the hub was being reset. To work around
this bug, this patch adds code to initially request the status of every
port after a hub was enumerated, clear the Connect Status Change bit if
set, and then enumerate the port iff it is currently connected,
regardless of whether the change bit was set. A similar behavior can
also be found in the Linux kernel.

BRANCH=oak
BUG=b:35929438
TEST=Booted Elm with this change, my USB 3.0 sticks enumerate now even
if they had been plugged in since boot.

Change-Id: I8a28252eb94f005f04866d06e4fc61ea265cee89
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18729
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-15 00:54:23 +01:00
Nicola Corna fece39baa5 nvramcui: Add USB support
Enable the USB during the initialization of nvramcui. Without it
the USB keyboards don't work, which makes this payload pointless
on the systems where a PS/2 keyboard port isn't available.

Based on https://review.coreboot.org/#/c/17507/

Change-Id: I04697c5f582b41e6f6ffe98955bf59f4fe57f66e
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18765
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-03-13 17:11:12 +01:00
Patrick Rudolph b854ae2649 libpayload-x86: Enable SSE and FPU when present
Allows to use SSE and floating point in payloads without digging to
much into x86 assembly code.

Tested on Lenovo T500 (Intel Core2Duo).
Both floating point operation and SSE is properly working.

Change-Id: I4a5fc633f158de421b70435a8bfdc0dcaa504c72
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18345
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-03-08 04:44:12 +01:00
Ricardo Ribalda Delgado 77ced402fb payloads/seabios: Add support for Hudson UART
Since version 9332965 "serialio: Support for mmap serial ports", SeaBIOS
supports memory mapped serial ports. This patch automatically configures
SeaBIOS when the Hudson UART is enabled.

Change-Id: I072f6a957df7e143d790783546b0725bcd597d9c
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-on: https://review.coreboot.org/18025
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-02-28 14:12:22 +01:00
Denis 'GNUtoo' Carikli 08cf195f4c payloads/external/GRUB2: Add "git revision" to the GRUB2 version menu
This change is based on the following commit:
3aa91dc payloads/seabios: Add "git revision" to the SeaBIOS version menu

Change-Id: I9987e3673e70b5cb20173d1ddff6060f42a5374a
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/18352
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-24 03:50:02 +01:00
Paul Kocialkowski 7a543d2ab9 libpayload: Add oak config
This adds an oak libpayload config, that should fit all oak-based
devices such as elm.

Change-Id: Iabb71404ff84029a5976371a353e8c92e781ca1f
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/18447
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-02-23 17:03:45 +01:00
Paul Menzel 7c7b176169 grub: Build module `boottime`
Configure GRUB to build with boot time statistics. That allows users
to add that module to GRUB by adding `boottime` to the list of extra
modules.

Change-Id: I76a07e49aecb37652fe8c7d6a9421fd464424287
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/18367
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-02-17 18:23:23 +01:00
Mathias Krause 898de6111a libpayload: multiboot - support meminfo flag
Some simple implementation of the MultiBoot protocol may not pass a
memory map (MULTIBOOT_FLAGS_MMAP missing in the flags) but just the two
values for low and high memory, indicated by the MULTIBOOT_FLAGS_MEMINFO
flag.

Support those kind of boot loaders too, instead of falling back to the
hard-coded values in lib_get_sysinfo().

Tested with a multiboot enhanced version of FILO.

Change-Id: I22cf9e3ec0075aff040390bd177c5cd22d439b81
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18350
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-02-17 18:20:38 +01:00
Mathias Krause d2f16cac74 libpayload: x86/head - implement argc/argv handling
Implement the argc/argv passing as described in coreboot’s payload API:
http://www.coreboot.org/Payload_API

While at it, give the code some love by not needlessly trashing register
values.

Change-Id: Ib830f2c67b631b7216843203cefd55d9bb780d83
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18336
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2017-02-17 17:29:40 +01:00
Mathias Krause 57dc93c967 libpayload: x86/exec - simplify and robustify the code
Simplify the code by directly using the arguments on the stack as base
pointer relative memory references, instead of loading them into
intermediate registers first.

Make it more robust by preserving all callee saved registers mandated by
the C calling convention (and only those), namely EBP, EBX, ESI and EDI.

Don't assume anything about the register state when the called function
returns -- beside the segment registers and the stack pointer to be
still the same as before the call.

Change-Id: I383d6ccefc5b3d5cca37a1c9b638c231bbc48aa8
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18335
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2017-02-17 17:27:55 +01:00
Mathias Krause 7b681c5926 libpayload: x86/main - propagate return value of main()
According to coreboot’s payload API [1], the called payload should be
able to return a value via %eax. Support this by changing the prototype
of start_main() and pass on the return value of main() to the caller
instead of discarding it.

[1] https://www.coreboot.org/Payload_API

Change-Id: I8442faea19cc8e04487092f8e61aa4e5cba3ba76
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18334
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-17 17:25:11 +01:00
Mathias Krause 9fa78c136d libpayload: x86/exec - fix argc/argv value passing
According to coreboot’s payload API [1] the argc value should be passed
at stack offset 0x10, so we need to push a dummy value to comply to the
API.

[1] https://www.coreboot.org/Payload_API

Change-Id: Id20424185a5bf7e4d94de1886a2cece3f3968371
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18333
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-17 17:24:08 +01:00
Mathias Krause 901efea8ab libpayload: x86/exec - fix return value passing
The pointer to write the return value to is in %ecx, not %eax. Writing
to (%eax) leads to memory corruptions as %eax holds the return value,
e.g. would write zero to address zero for a "successful" returning
payload.

Change-Id: I82df27ae89a9e3d25f479ebdda2b50ea57565459
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18332
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-15 21:56:14 +01:00
Mathias Krause d42c38b93c libpayload: x86/exec - fix libpayload API magic value
According to coreboot’s payload API [1] the magic value passed to the
payload should be 0x12345678, not 12345678. Fix that.

[1] https://www.coreboot.org/Payload_API

Change-Id: I10a7f7b1a4aec100416c5e7e4ba7f8add10ef5c5
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: https://review.coreboot.org/18331
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-15 21:55:21 +01:00
Marshall Dawson fc18507134 payloads/depthcharge: Allow generic libpayload config
Change depthcharge to not require a board-specific config file for
libpayload.  If the Kconfig option is selected, use the settings
in libpayload/configs/defconfig instead.

Change-Id: I4fd1a5915472f28e757c62f3f2415716f1fdfc71
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18271
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01 21:14:29 +01:00
Marshall Dawson f9973b5c2b payloads/depthcharge: Specify revision to build
Add the capability for specifying which version of depthcharge to
checkout and build.  This is similar to the existing feature for
SeaBIOS.

The depthcharge makefile already contains some structure for checking
out master vs. stable however the calling Makefile.inc ingored this
feature.  Add the command-line variable assignment for these, along
with a tree-ish for any revision.

Change-Id: I99a5b088cb0ebb29e5d96a84217b3bfa852de8ac
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18270
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01 20:15:04 +01:00
Marshall Dawson 8f470c7a7e payloads/depthcharge: Use variable target name
Depending on the commit to build, depthcharge may have a different
target name (depthcharge vs. depthcharge_unified).  Add some logic
to determine which name should be used based on the commit ID
being requested.

Change-Id: I05b853934d13696f4bd0d79d53ff6c5f59096d1c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18269
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01 20:14:53 +01:00
Marshall Dawson 9e33e27a46 payloads/depthcharge: Change make target from unified
Drop the _unified moniker from the depthcharge build.  The payload
and coreboot have drifted out of sync and there is no longer a
non-unified depthcharge.

This patch corresponds with the depthcharge change:
https://review.coreboot.org/cgit/depthcharge.git/commit/?id=74a0739

Change-Id: I8d028b14d2eee63dfdc9d3dd63695f1c58ea7984
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18268
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-02-01 20:14:26 +01:00
Martin Roth 8556db35e0 SeaBIOS Kconfig: Update logging
The SeaBIOS and coreboot log levels don't really align, so setting the
SeaBIOS log level to the same as coreboot's isn't really what we want.

- Update default log level to use the default SeaBIOS log level.
- Update the current help text to match the new defaults.
- Add help text for what is displayed at various levels.
- Get rid of separate type & prompt lines.
- Add comments for default seabios level & logging disabled

Change-Id: I5a8b75bd44748cb94a83a77ac3a379c8a9587e7b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18210
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
2017-01-27 19:46:26 +01:00
Patrick Georgi b144a34c60 libpayload: fix build
When .xcompile doesn't already exist, building libpayload fails because
the CC variable (et al) remain empty since .xcompile is only included
after the variables coming from there are evaluated.

Change-Id: I73f1cbced95afcff15839604fea5fd05d81bc3d3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/18228
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-25 17:58:48 +01:00
Paul Menzel e7385d14b1 nvramcui: Declare variable outside for loop
Make the code C89 compatible, which doesn’t allow loop initial
declarations. Older compilers use C89 by default, so just declare the
variable outside.

Change-Id: I3c5a8109e66f7a25687f4e4b2c72718d74276e04
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18196
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-01-25 10:05:54 +01:00
Patrick Georgi 0ffef882d8 build system: don't run xcompile or git for %clean/%config targets
It takes a long time for no gain: We don't need to update the
submodules, we don't need to fetch the revision, we don't need to find
the compilers, when all we want to do is to manipulate the .config file
or clean the build directory.

Change-Id: Ie1bd446a0d49a81e3cccdb56fe2c43ffd83b6c98
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/18182
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-24 23:22:56 +01:00
Shelley Chen 674e971dc4 libpayload: drivers/keyboard: report power button events
Power button events are usually dropped because the button is not in
the keyboard matrix range.  Add condition to forward it like other keys.

BUG=chrome-os-partner:61275
BRANCH=None
TEST=reboot and make sure power button selection
     in depthcharge's detachable menus is processed on reef.

Change-Id: I86897fa8d73a56533ef62bba05458ac3d339237e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 25654e214f0ab8685d445ced62612a02be851126
Original-Change-Id: I516a0043bd7730789728d5c5498d0a0f30a2acac
Original-Signed-off-by: Shelley Chen <shchen@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/428199
Original-Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://review.coreboot.org/18177
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-24 09:33:48 +01:00
Paul Kocialkowski 3e7f14bfae libpayload: Enable USB HID in veyron configuration
This enables USB HID support in the veyron config, since it seems to
work correctly and is needed for interaction with depthcharge on devices
without an embedded keyboard (such as veyron_mickey).

Change-Id: Icae829e3a132005df17bcb6f7e6f8a190912576d
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/17930
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-01-19 23:00:46 +01:00
Stefan Tauner c48d791506 SeaBIOS: Add Kconfig option to set verbosity level
Previously SeaBIOS's default was used (1). This patch defaults to
coreboot's console level instead which is approximately the same
verbosity as SeaBIOS and thus what a user would probably expect.

Change-Id: If79e5f40c9380bb527f870eeb7d0cb43faf00beb
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/18051
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-17 18:01:56 +01:00
Jeffy Chen 9a3f06d202 libpayload: usb: Reset ohci controller when trying to shutdown ohci
Currently we just disabled ohci interrupts when calling ohci_shutdown,
Which would not actually shutdown the ohci controller, for example it
may still written the increased HccaFrameNumber to Hcca buffer.

Perform a soft reset to ohci controller as the linux kernel ohci-hcd
driver does.

BUG=chrome-os-partner:60996
BRANCH=None
TEST=Checked on gru, no more "BUG: Bad page state" error in kernel.

Change-Id: I128ab6ba455ac5383a4d48be0bc12b8bb4533464
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4749fc82fdd1b74ca3f2ed3fdf0ef53a5e161087
Original-Change-Id: I3f192aea627ba2fa69533bc0a4270466ca18f2a7
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/426338
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/18125
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-13 17:40:25 +01:00
Kan Yan b6cadc6465 libpayload: Add VPD address into lib_sysinfo
BUG=chrome-os-partner:56947
TEST=Verifed country code can be parsed from VPD in depthcharge.
BRANCH=None

Change-Id: I2fbbd4a784c50538331747e1ef78c33c6b8a679b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: acea6e2a200e8bd78fd458255ac7fad307406989
Original-Change-Id: I4616fefc6a377d7830397cdadb493927358e25cc
Original-Signed-off-by: Kan Yan <kyan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/425819
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/18124
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-01-13 17:40:10 +01:00
Paul Kocialkowski 7a9ec36fd4 libpayload: Update ARM CrOS devices configuration
This updates the configuration for ARM CrOS devices (nyans and veyrons)
by using the CHROMEOS Kconfig option, thus reducing the number of
options to select. It also brings proper serial console support.

Change-Id: Iffc84c44a1d339c5bb575fbaffc40bc2d56bb6cf
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/17928
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-01-13 17:34:22 +01:00
Denis 'GNUtoo' Carikli 8fb72c9147 payloads/GRUB2: Add Kconfig options for grub.cfg
Change-Id: I5480d6a5f2a6bbae4222e05bbe92eb717e1aff65
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Martin Roth <martinroth@google.com>
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/5109
Tested-by: build bot (Jenkins)
2017-01-10 17:50:21 +01:00
Patrick Georgi b5623dede7 libpayload: usb: handle situation with no free device address
Change-Id: I1308bdca90f1a09d980f384ee85552198a39b965
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1260940
Reviewed-on: https://review.coreboot.org/18036
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06 18:43:05 +01:00
Patrick Georgi a370ae8556 libpayload: xhci: plug leak
Change-Id: Ia163872846906c6c78144a984a405812f856f626
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1325835
Reviewed-on: https://review.coreboot.org/18035
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06 18:42:18 +01:00
Patrick Georgi 61dac130b2 libpayload: timer: cast cpu_khz to make sure 64bit math is used
Change-Id: Iaf84de2330b433076a66c22fa72ffb45e957c0dc
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Found-by: Coverity Scan #1261177
Reviewed-on: https://review.coreboot.org/18034
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06 18:40:44 +01:00
Philipp Deppenwiese 40843efe5d payloads/external/SeaBIOS: Bump version to 1.10.1
Changes since SeaBIOS 1.9.3

Release 1.10.0:
* Initial support for Trusted Platform Module (TPM) version 2.0
* Several USB XHCI timing fixes on real hardware
* Support for "LSI MPT Fusion" scsi controllers on QEMU
* Support for virtio devices mapped above 4GB
* Several bug fixes and code cleanups

Release 1.10.1:
* Updates for QEMU for reproducible builds

Change-Id: I465700307d72fa44b6900b38b332603ea505ed09
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/18026
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-06 18:10:12 +01:00
Jonathan Neuschäfer 29d5be151c payloads/external: Download FILO over HTTPS
Change-Id: I1b44e32505b96978849d39764ff399a502fa6e84
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/17972
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-12-29 08:52:53 +01:00