Commit graph

799 commits

Author SHA1 Message Date
Vladimir Serbinenko
46a86f284f agesa/family12: Switch to per-device ACPI
Change-Id: I944e35b04612eca8add80c9f546df99a9a930ac8
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7036
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26 21:33:00 +01:00
Vladimir Serbinenko
db09b062ca agesa/family16kb: Switch to per-device ACPI
Change-Id: I7d9cbbd1aeadecc1a4c91816df303c6cb4817fe3
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7034
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26 21:32:40 +01:00
Vladimir Serbinenko
56f46d87d2 agesa/family15tn: Switch to per-device ACPI
Change-Id: Icc2e7b66b3ff5f70b219a3e67494ce3df055c9d5
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7033
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-26 21:31:32 +01:00
Vladimir Serbinenko
8be624f1f3 agesa/family15: Switch to per-device ACPI
Change-Id: I3847eb1524a5a816cd4885a31d703b410804c1f0
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7032
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-26 21:31:01 +01:00
Kyösti Mälkki
68a83df6df agesa/family14: Fix includes for ACPI
Change-Id: Ic4425840a984a7713088a2568e25bae982e22fc2
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7582
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-11-26 21:30:32 +01:00
Vladimir Serbinenko
4ab588b1dd agea/family14: Switch to per-device ACPI
Change-Id: Icc663c28713f2d872bfeb1749303ce92db953bf5
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7031
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-11-25 23:51:06 +01:00
Edward O'Callaghan
66c6532eb6 northbridge/amd/agesa/family16kb: Add MMCONF res to PCI_DOMAIN
This is a port of the following:
commit d5c998be99

  The coreboot resource allocator doesn't respect resources
  claimed in the APIC_CLUSTER. Move the MMCONF resource to the
  PCI_DOMAIN to prevent overlap with PCI devices.

Change-Id: I49167dd3f15d0203a7db8950880ab03171d5c170
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7533
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-25 14:52:52 +01:00
Edward O'Callaghan
f0c73ac341 northbridge/amd/agesa/family12/dimmSpd.c: Use ARRAY_SIZE macro
Change-Id: Icf980088c196b152cc4e5e179f7b7e334b695ccc
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7574
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-25 12:21:46 +01:00
Edward O'Callaghan
453e4c2e73 northbridge/amd/agesa: Remove useless northbridge.h header
Remove northbridge.h headers which only contain static declaritions
which is silly.

Change-Id: I3e8890a34b4729bb0944bd97a3b9576b841d2354
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7532
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24 05:38:42 +01:00
Edward O'Callaghan
30b1042020 northbridge/amd/agesa/family15: Remove redudant prototype
Function is static local only and so no need for a static
prototype in header. Sync's header with other fam's also.

Change-Id: I540aeafb8528e229700b6d596d4d8094c22e7625
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7531
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24 05:38:23 +01:00
Edward O'Callaghan
541ac596a2 northbridge/amd/agesa/family1{2,4}: make get_node_pci() static
Function is local only, as is with other families also.

Change-Id: I1f652be1763a319b2f1c9b0f53e76d6bc44f3450
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7530
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-24 05:38:02 +01:00
Edward O'Callaghan
ae5fd3453a northbridge/amd/agesa/family1{4,5,5tn,6kb}: Reduce differences
Lets cut down on whitespace differences, fix some typos and indents.
Also make use of ARRAY_SIZE() macro instead of a local redefinition.

Fix NULL pointer checks ordering and not to use zero.

Change-Id: I93f344d300c04570d795659d848255cb1832e1d8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7528
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-24 05:37:50 +01:00
Vladimir Serbinenko
f8457985d8 amdk8: Move to implicit length patching
Change-Id: I8b4c36adaa7ea791ae1a8f7c0d059b9201b08f94
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7332
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-22 16:58:29 +01:00
Vladimir Serbinenko
2a19fb1d76 amdfam10: Move to per-device ACPI
Change-Id: I9ce2333e1ea527843f83d411dea2a669263156c2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7027
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-22 16:57:07 +01:00
Edward O'Callaghan
b32e1f4149 northbridge/amd/agesa/Kconfig: Trivial - correct indent
Change-Id: Ia7d9cb77f83afda66a1fe4e1228f2728c94e1c99
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7535
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-21 02:36:07 +01:00
Edward O'Callaghan
d994ef1932 northbridge/amd/agesa: DEVICE_NOOP some stub functions
Use 'DEVICE_NOOP' over stub functions to reduce loc and
improve formalism.

Change-Id: I9c8d608539647cce22fb1dfbe284a6043d3d23d9
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7534
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-21 02:35:59 +01:00
Kyösti Mälkki
023ed1f999 amd/olivehillplus: Share agesawrapper header
This interface is common with AMD PI implementations.

Change-Id: Ifabfce97db749e04aa19e53f62216be78158b282
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7150
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
2014-11-20 19:06:26 +01:00
Kyösti Mälkki
e4c17ce803 AMD: Isolate AGESA and PI build environments
To backport features introduced with recent Chromebooks and/or Intel
boards in general, heavy work on the AMD AGESA platform infrastructure
is required. With the AGESA PI available in binary form only, community
members have little means to verify, debug and develop for the said
platforms.

Thus it makes sense to fork the existing agesawrapper interfaces, to give
AMD PI platforms a clean and independent sandbox. New directory layout
reflects the separation already taken place under 3rdparty/ and vendorcode/.

Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7149
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
2014-11-20 19:02:37 +01:00
Edward O'Callaghan
bf26243a00 northbridge/amd/amdfam10/conf.c: Remove extraneous parentheses
Remove extraneous parentheses around the comparison. Fix some
style while here.

Found-by: Clang
Change-Id: I882729b8fa9f32a3bb9b1524d4d8829cbb226b7d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7445
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-11-16 09:41:44 +01:00
Vladimir Serbinenko
bf8722aac8 Make set_bios_reset into normal rather than weak function
Change-Id: I2efa254537f83fe689fd07fe6ec80f0446ad5a9d
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7370
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-15 20:47:33 +01:00
Kyösti Mälkki
eaee6e2d95 AMD: Move RAMBASE and RAMTOP
There are no reasons to not load ramstage @ 0x100000.

Boards with HAVE_ACPI_RESUME enabled have performance penalty in using
excessive RAMTOP. For these boards, this change releases 11 MiB of RAM from CBMEM allocation to OS.

Change-Id: Ib71995aba5e9332d0ec1626b3eb3b4ef6a506d1c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7094
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-14 15:46:57 +01:00
Edward O'Callaghan
2837ab2cdf northbridge: DEVICE_NOOP some stub function callbacks
Reduces loc and makes NOP's explicit.

Change-Id: I8a117b150b8b421c7a18b48a2ac36d15679f20b0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7344
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-11-06 22:20:53 +01:00
Edward O'Callaghan
3ec9c95d02 Use 'pci_devfn_t' over 'device_t' mixed type in 'reset.c'
Change-Id: I1a1412a1ee4125dcf1f01dc1f2ec6fd43b5d3c1f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7196
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-11-05 14:53:56 +01:00
Edward O'Callaghan
812d2a47d4 northbridge/amd: Use DEVICE_NOOP macro over dummy symbol
Change-Id: I3fdd2a9f981592112998d74ce4cfe4850d8fab31
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7288
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-11-01 21:16:21 +01:00
Kyösti Mälkki
30fbb4c23e AGESA boards: Fix early agesawrapper_amdinitmmio()
Regression introduced with commit

   7b23ae0 AGESA: Trace execution with AGESAWRAPPER()

As the call is made before console_init() is called it must
not call any printk(). Debugging Olivehill and Parmer platforms
using a custom FPGA (as these boards have no Super-IO UART) have
been observed to halt and/or delay at early boot.

Change-Id: I3ab4e5378db44aece9046c8636cde1053ce5390d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7059
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
2014-10-22 15:04:32 +02:00
Kyösti Mälkki
26f297e981 AGESA: Drop board and chipset -specific callout headers
Change-Id: If973f28931e65a57cbb8d6739542a57c844f0d66
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7115
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-19 06:20:58 +02:00
Kyösti Mälkki
a1ebbc42ad AGESA fam12 fam14 fam15: Use common agesa_readSpd()
Remove northbridge specific callouts for AGESA_READ_SPD.

Move low-level SMBus code to southbridge.

Change-Id: I5fc91c49d9ef8e0af1c4d8194f857c61ce417d1d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7113
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-19 06:19:44 +02:00
Kyösti Mälkki
c5cc9f233c AGESA fam15tn fam16kb 00730f01: Add common agesa_readSpd()
Remove northbridge specific callouts for AGESA_READ_SPD.

Move low-level SMBus code to southbridge.

Change-Id: I3e272389e2a7db542fb48fca8606325af27b65a5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7112
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-19 06:18:39 +02:00
Vladimir Serbinenko
b752e4f402 acpi_add_ssdt_pstates: Remove function.
Nowhere in database p_state_num is set. So this whole function ends up
being a noop. Moreover the offsets used by it are wrong with any
optimizing iasl. Remove it in preparation of move to per-device ACPI.

Change-Id: I1f1f9743565aa8f0b8fca472ad4cb6d7542fcecb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7012
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-10-17 10:04:12 +02:00
Vladimir Serbinenko
f21271edb5 Fix mismerge of ACPI patches
Change-Id: I2a9960861465f4686113213d5e5793333b6274b2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7079
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-17 09:31:28 +02:00
Vladimir Serbinenko
6985d4ee07 amdk8: Move to per-device ACPI
Change-Id: I485791015aa7eaabba53813945c216f5725554b1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6948
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-16 13:35:53 +02:00
Vladimir Serbinenko
822bc65b0e ACPI: Remove CONFIG_GENERATE_ACPI_TABLES
As currently many systems would be barely functional without ACPI,
always generate ACPI tables if supported.

Change-Id: I372dbd03101030c904dab153552a1291f3b63518
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4609
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2014-10-16 12:01:10 +02:00
Bruce Griffith
27ed80bce1 AMD Steppe Eagle: Add northbridge files for new SoC family
Add the northbridge file for AMD's new Mullins and Steppe Eagle
processor family.  Since the processor family name is not the
same across AMD's sales and marketing channels, I have elected
to use part of the processor ID as the family name.  The intent
is to reduce confusion since the processor ID is the same for
both families.  This northbridge support has only been validated
on the AMD Embedded variants ("Steppe Eagle").

The AGESA wrappers in coreboot have a function that is intended to
mirror the UMA memory allocation performed during memory initialization
by AGESA.  Update the Steppe Eagle memory allocation to mimic the
memory reservation done inside the AGESA BLOB.

Change the default CBMEM address, the default video BIOS device ID,
and a couple of other defaults to match changes in coreboot community
code.

The northbridge chip.h specifies how many processor sockets, how
many channels, and how many DIMM slots are supported by the
northbridge.  Steppe Eagle does not permit multisocket systems
and has only one memory controller channel.

Change-Id: I20d8b78e3b153cda2dd05100fbb75e2ebadd9e08
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/6678
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
2014-08-30 19:14:42 +02:00
Bruce Griffith
ae143f71e7 AMD Family 14: Fix permissions on one northbridge file
fam14_callouts.h should not have the execute bit set.

Change-Id: Iab44d04f2c9669e28d2d5028b0a11e565cc7bb07
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/6675
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-16 16:05:14 +02:00
Edward O'Callaghan
c3fda416a7 northbridge/amd/agesa/agesawrapper_call.h: Decode status codes
Decode obscure AGESA status codes into their respective string forms.

Change-Id: Iccf175ef62e5005af6ebbfb1bd0acec8aedc2eaa
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6402
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-07-31 04:13:51 +02:00
Elyes HAOUAS
0f92f63055 Uniformly spell frequency unit symbol as Hz
Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6384
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-29 04:40:27 +02:00
Kyösti Mälkki
526c2fb278 AGESA: Drop some excessive agesawrapper.h includes
Change-Id: I3807912b1dc68fae8248a66e37bbe642fb92d3ae
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6262
Tested-by: build bot (Jenkins)
2014-07-28 17:20:01 +02:00
Elyes HAOUAS
1631c880eb northbridge/amd: Remove trailing whitespace
Change-Id: Iccad59ebac1c47ee3fd16c0c1244b62184cfd1bf
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/6316
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24 12:43:04 +02:00
Edward O'Callaghan
e6d4732c41 northbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF
Change-Id: Id1fcd3d1cd8a156a76e1a9a3ca4c7b4004c2c015
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6289
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:20:39 +02:00
Edward O'Callaghan
c1b1c8e9b3 northbridge,ASL: Trivial - drop trailing blank lines at EOF
Change-Id: I8d4bf17fe9fd82499b1515a8e85dff9cba498350
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6294
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17 02:17:30 +02:00
Kyösti Mälkki
d005f78d29 AGESA fam15: Fix entry to cimx/sb900
Move SB900 call to match comments and changes already made for
family14 et al.

Change-Id: I22aa0bbeeabf9cff929c49c23014005bc3d53ccb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6238
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:49:32 +02:00
Kyösti Mälkki
232ae17718 AGESA fam12: Fix entry to cimx/sb700
Move SB700 calls to match comments and changes already made for
family14 et al.

Change-Id: I20a84e487ba346f63dd4454447077e0d2fd12c89
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6222
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:48:29 +02:00
Kyösti Mälkki
7b23ae0e89 AGESA: Trace execution with AGESAWRAPPER()
Implement logging just once to have uniform output.

Change-Id: I8db694a3bf6b1af459bdf98f7acb99edf4dd07f7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6180
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14 19:48:00 +02:00
Edward O'Callaghan
7116ac8037 src: Make use of 'CEIL_DIV(a, b)' macro across tree
The objective here is to tighten coreboot up a bit by not repeating
common helpers. This makes the code base more consistent and
unified/tight.

Change-Id: Ia163eae68b4a84a00ed118125e70308fab1cea0c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6215
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-11 08:39:07 +02:00
Dave Frodin
7e5494c549 northbridge/amd: Fix the family15tn option rom mapping
Family15tn video bioses internal have a PCI ID of 1002/9901.
The vendor/device mapping in the family15tn/northbridge.c
file needs to map to 1002/9901 and not to 1002/9900.
This was tested on the amd/parmer mainboard.

Change-Id: I0153e9b522e847099c6054d91bf73b50966ed838
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/6252
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-10 19:29:38 +02:00
Edward O'Callaghan
234781e074 northbridge: Trivial - drop trailing blank lines at EOF
Change-Id: I9515778e97cc5ae0e366b888da90a651ae5994fe
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6210
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-08 13:53:35 +02:00
Kyösti Mälkki
36abdc4017 gizmosphere/gizmo: Move support of SPD data in CBFS
This code is not specific to any board or AGESA family.

Change-Id: I26c32fbe8e45018e239762b072dfe3da05271697
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5690
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-05 11:41:52 +02:00
Dave Frodin
2093c4f7c2 AMD/agesa: Add functions for AMD PCI IRQ routing
Port the changes that were made in amd/cimx to amd/agesa
as were done in:
   commit c93a75a5ab
   Author: Mike Loptien <mike.loptien@se-eng.com>
   Date:   Fri Jun 6 15:16:29 2014 -0600

      AMD/CIMx: Add functions for AMD PCI IRQ routing

This change also moves the PCI INT functions to
southbridge/amd so that they can be used by CIMX and
AGESA. The amd/persimmon board is updated for this
change.

Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Change-Id: I525be90f9cf8e825e162d53a7ecd1e69c6e27637
Reviewed-on: http://review.coreboot.org/6065
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-02 21:47:28 +02:00
Edward O'Callaghan
df3629b63c northbridge/amd/{gx2,lx}: Qualify pointer with volatile
There is no guarantee reading a dereferenced null pointer will not be
optimised away. Qualify the integer storage type with volatile. Clang
enforces this explicitness.

Change-Id: I31524141d70632cade0490c820936a3a8b570346
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6148
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-30 18:14:31 +02:00
Edward O'Callaghan
d2a7523cb1 northbridge/amd/gx2/raminit.c Halt func needs noreturn attrib
Missing "__attribute__((noreturn))" on halt function. This sync's the
implementation to be the same as that of amd/lx thereby avoiding
compiler warnings.

Change-Id: Iead16125805eb36ff875fba767cf8d4e5aa86715
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6157
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-29 15:04:48 +02:00