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5870 Commits

Author SHA1 Message Date
Marshall Buschman 552ad9f75e Port persimmon r6584 and r6601 to e350m1: SPI prefetch early 
Enable SPI cacheline prefetch early to reduce boot time.

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:45:12 +00:00
Marshall Buschman fd460e620e Port persimmon r6583 to e350m1: pstate 0 early 
Switch processor cores to pstate 0 early to reduce boot time.

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:44:54 +00:00
Marshall Buschman b3ee0d6bd6 Port persimmon r6582 to e350m1: 33 MHz SPI read early 
Enable 33 MHz fast mode SPI read early to reduce boot time.

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:44:31 +00:00
Peter Stuge 69e1bfcf34 Port persimmon r6578 and r6596 to e350m1: MMCONF base 
Remove multiple mmconf settings and just use kconfig setting.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:44:14 +00:00
Marshall Buschman eb92b5ad64 Port persimmon r6574 to e350m1: MMCONF size 
Size mmconf according to CONFIG_MMCONF_BUS_NUMBER.

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:43:56 +00:00
Marshall Buschman 5a403191cb Port persimmon r6573 to e350m1: VGA, PCI MMIO and SB800 legacy 
1) Use D18F1xF4 VGA Enable to simplify legacy video I/O support.
2) Extend PCI MMIO limit from dfffffff to fecfffff.
3) Add AMD recommended non-posted mapping for SB800 legacy devices.

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:43:38 +00:00
Marshall Buschman 6d5ee2d80a Port persimmon r6572 to e350m1: I/O APIC ID 
1) Set I/O APIC ID according to BKDG recommendation
2) Correct I/O APIC ID reported by mptable

Signed-off-by: Marshall Buschman <mbuschman@lucidmachines.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:43:15 +00:00
Peter Stuge e1898b5fa1 vt8237r: Simplify bootblock init to work around nested if() romcc problem 
During the hackathon in Prague we discovered that romcc has a problem
compiling the previous nested if() statements correctly. This patch
makes the code a little simpler, and indeed works around the romcc issue.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-04 15:40:12 +00:00
Marc Jones 471f103e53 This patch sets max freq defaults for ddr2 and ddr3for fam10. 
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Scott Duplichan <scott@notabs.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-03 19:59:52 +00:00
Alexandru Gagniuc 23d3dfaa96 Correct wrong PCI ID for VIA K8M890 Chrome. 
With the K8T800/M800 patch from r6367 the PCI IDs for the VIA chrome were
moved to pci_ids.h. The PCI ID for K8M890 chrome was copied incorrectly.
(3220 instead of 3230). This patch defines the correct PCI ID for this device.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-03 19:46:25 +00:00
Kerry She 3bf2708664 advansus/a785e-i mainboard enable warning as error 
Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Kerry She <kerry.she@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-03 10:14:56 +00:00
Patrick Georgi b2a4264ea5 Really fix iasl filename issues in our build system 
There's a remaining issue that iasl cuts of "\..*$" from
output paths, even if that substring contains "/" (ie.
across directories)

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-01 19:54:16 +00:00
Patrick Georgi f9d19f2a26 Report build result from abuild (did all requested boards build?) 
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-01 19:29:48 +00:00
Kerry She 76d53b22d3 trivial remove blanks at the end of line 
Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Kerry She <kerry.she@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-01 02:00:30 +00:00
Kerry She 991f880893 This patch fix a AMD sb800 wrapper compile warning: 
src/southbridge/amd/cimx_wrapper/sb800/late
 call clear_ioapic but not include the prototype declare header file.

Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-06-01 01:56:49 +00:00
Stefan Reinauer b2ecd81514 We don't have pausing versions of single-IO instructions. 
Hence remove the wrong comment.

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-23 22:48:13 +00:00
Stefan Reinauer 9cb175632d AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards. 
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-23 22:43:43 +00:00
Jonathan Kollasch 4053e1412f Correct implementation of r6608. 
(.align actually takes its argument in bytes)

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-23 17:55:20 +00:00
Stefan Reinauer 2c19f5d333 exclude src/vendorcode from GPLv2 license checks. 
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-23 17:16:44 +00:00
Jonathan Kollasch 6409a22586 Ensure ck804 romstrap is 16-byte aligned. 
This alignment seems to be necessary for the chip to recognize it.

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-22 15:39:25 +00:00
Patrick Georgi 40ad842ade Add regression test for build directory handling to make lint target 
A couple of scenarios that were fixed in the last few revisions are
tested to ensure that it's easy to determine breakage.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-21 22:18:59 +00:00
Patrick Georgi 29ddbb813f Handle absolute source file paths 
We used to fail there because we unconditionally prefixed the relative directory where it was referenced.
Tested in various scenarios:
- obj=build
- obj=../obj
- obj=$PWD/../obj
- obj=/some/other/absolute/path
- obj=/./some/other/absolute/path

In-tree relative paths still work as before, the only change in behaviour is when a source file name (as specified in one of the *-y variables) starts with "/".


Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 23:31:41 +00:00
Patrick Georgi 64ccc3b803 Handle both cases, obj being absolute and relative 
gnu make's handling of filenames is less than optimal. It simply
compares strings, so foo/../bar is different from bar, even though
they're logically the same.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 23:08:12 +00:00
Patrick Georgi 447cf563ca Fix building with relative path to object directory outside the source tree 
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6604 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 22:17:58 +00:00
Patrick Georgi 0c5b0642a9 iasl still can't cope with extra "." in file paths 
It's really a work around, but given how this issue seems to come
back again and again, let's work around it.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6603 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 22:16:49 +00:00
Patrick Georgi 96dafaf44d Fix ccache behaviour if more than one ccache in PATH 
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 22:14:07 +00:00
Scott Duplichan fb93178f13 Correct amd persimmon romstage code for early SPI prefetch enable. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Scott Duplichan <scott@notabs.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 17:50:14 +00:00
Scott Duplichan 20aad25e6e Move the ACPI FACP table to the front of the RSDT list. This is done to work around a Windows XP or Server 2003 setup failure where an error message such as: "An unexpected error (805262864) occurred at line 1768 of d:\xpclient\base\boot\setup\arcdisp.c" occurs. This change updates AMD reference board projects, but could applied to others as well. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-20 00:06:09 +00:00
Patrick Georgi 6c44550df1 Move crossgcc rules to coreboot specific Makefile 
Toplevel Makefile should (as far as possible) be coreboot-agnostic,
we have Makefile.inc for that.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-16 15:32:28 +00:00
Cristian Magherusan-Stanciu 0b933d4644 Add crossgcc target to automatically build reference toolchain 
This means that a simple:

$ make crossgcc

creates the reference toolchain in the correct directory. Thanks to the
dependency on the clean-for-update target, an existing .xcompile along
with any compiled objects in build/ will be cleaned out, so the next
build will automatically use the newly created reference toolchain.

Signed-off-by: Cristian Magherusan-Stanciu <cristi.magherusan@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-16 01:35:03 +00:00
Peter Stuge 3f0075b3d2 cimx_wrapper/sb800: Fix indent in late.c:sb800_enable() 
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6597 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-16 00:05:50 +00:00
Marc Jones 44d3c3dade Remove multiple mmconf settings and just use kconfig setting. 
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 23:13:54 +00:00
Peter Stuge 16c8e37a2d agesa_wrapper: Avoid repetitive Kconfig depends, trivial 
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:40:40 +00:00
Scott Duplichan 8c46263721 Cosmetic cleanup. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6594 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:10:15 +00:00
Scott Duplichan 5d878ad312 1) Remove unused kconfig options. 
2) Correct UMA graphics PCI device ID.

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6593 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:09:09 +00:00
Scott Duplichan a64ab46b62 Update gpp port configuration. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6592 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:07:56 +00:00
Scott Duplichan 769527e523 Enable rom cache early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:06:09 +00:00
Scott Duplichan 3c639e7df8 Fix memory allocation problem in amdInitLate. Disabled until further debug. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:05:00 +00:00
Scott Duplichan 0b886ae3c3 Remove some non-essential agesa options to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6589 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:03:45 +00:00
Scott Duplichan dbbbca3f33 Declare legacy video frame buffer so that Windows generic VGA driver will work. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6588 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:02:27 +00:00
Scott Duplichan 0ebefd27c8 Declare RTC as not PIIX4 compatible to match AMD hardware. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 22:00:23 +00:00
Scott Duplichan 254a6d6ea7 Make fadt revision match its length. Solves Windows 7 checked build assert. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:59:19 +00:00
Scott Duplichan b7e068305c Enable SPI cacheline prefetch early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:56:03 +00:00
Scott Duplichan 2cc5f550c7 Enable SPI cacheline prefetch early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6584 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:54:04 +00:00
Scott Duplichan d9a634c756 Switch processor cores to pstate 0 early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6583 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:51:31 +00:00
Scott Duplichan e73fc20886 Enable 33 MHz fast mode SPI read early to reduce boot time. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:48:22 +00:00
Scott Duplichan 9ab3c6c3a9 Build device paths for AP cores so that coreboot will report them to the OS. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6581 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:45:46 +00:00
Scott Duplichan be8fae1c71 Program the I/O APIC ID. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:41:00 +00:00
Scott Duplichan f191c72038 Enable AHCI mode and hide IDE controller to reduce boot time. 
Note: enable AHCI in seabios and apply seabios patch:
http://www.mail-archive.com/seabios@seabios.org/msg00437.html

Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:38:08 +00:00
Scott Duplichan dc312cca53 Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR. 
Signed-off-by: Scott Duplichan <scott@notabs.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2011-05-15 21:26:04 +00:00