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1434 Commits

Author SHA1 Message Date
Ron Minnich 5e9dc23120 This patch adds support for the AMD LX cpu. 
There is one global change to pci_ids.h. The rest are changes for LX. I
ran abuild and it is ok.  Not all artec design changes are included as
some of them would adversely affect other mainboards. Indrek will need
to test.


Signed-off-by: Ron Minnich
Signed-off-by: Indrek Kruusa, indrek.kruusa@artecdesign.ee, artec
design. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-28 16:06:16 +00:00
Stefan Reinauer e534daa05a add flashrom manpage from Uwe Hermann 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2349 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-27 23:29:02 +00:00
Ronald G. Minnich 59fc4db642 "Hey Ron - Attached is a simple patch that enables the upper banks on the 
UART.  If the upper banks are enabled, then the Linux 8250 driver knows
how to set baud speeds greater then 115200.  This was prompted by David
Woodhouse.

Jordan"




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-27 04:05:43 +00:00
Richard Smith cb8eab482f add framework for i440bx chipset 
add support for NSC pc87351 SuperIO
add Bitworks/IMS manboard config

This is a very basic framework for the i440bx chipset and the 
Bitworks IMS board that uses it.  Most things are 
structure only.

Known issues:
- SMbus reads to the RAM SPD come back
all zero.
- dump_spd_registers() is commented out since it breaks with
the default setting of generic_dump_spd.c where it wants
2 memory controllers.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-24 04:25:47 +00:00
Ronald G. Minnich 4788effb04 restore the old code for enabling flash. The new amd code did not work. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-21 23:21:01 +00:00
Ronald G. Minnich da7ee9fa07 These changes incorporate steve goodrich'es fixes, and one bug that is 
disabled. 

cs5536: add new entires for SB  control etc. 
cs5536.c: chip_enabled function moved to chip_init, so it only gets run
once.
IRQ setup improved
gx2def.h: new defines added
vr.h: new file, with new def's for virtual register control. 
mainboard config.lb: new entries added for nb and sb control.
chipsetinit.c: new controls added -- I forget all the details :-)
grphinit.c: new function added
northbridge.c: new IRQ control added. FlashChipSetup added, controlled
by chip info setupflash struct member. Currently, if enabled, this hangs
OLPC in linux PCI scan.
chip.h: new struct members added for unwanted device enable, flash setup 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-21 19:21:38 +00:00
Josiah England 35befb75ea New analysis tool with preliminary source usage information gathering. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-20 15:35:04 +00:00
Stefan Reinauer 87f194dd9e this code is for writing the mp table, so only execute it when 
we actually have one. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2343 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 16:58:43 +00:00
Stefan Reinauer 4f1cb23426 move mptable to 960k to 1M 
https://openbios.org/roundup/linuxbios/issue55

This patch is a little bit enhanced, it keeps the ppc table consistent,
which Yinghai's original patch did not.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 15:32:49 +00:00
Scott Tsai, scott.tsai e32243a9b1 From: Scott Tsai, scott.tsai <AT> arima.com.tw 
Tested on my home Shuttle SB51G box.
data sheet:
http://www.alldatasheet.com/datasheet-pdf/pdf/47674/WINBOND/W49V002FAP.html



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 15:13:21 +00:00
Stefan Reinauer 792ebfecd3 closing issue 44: rename ram clocks in cmos.layout 
https://openbios.org/roundup/linuxbios/issue44



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-19 14:26:41 +00:00
Stefan Reinauer ef0a24381b fixing aruma build as suggested by mail ;-) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-18 18:09:36 +00:00
Stefan Reinauer f780d02295 sorry for the inconvenience. this is a test commit. 
breaking a build is intentional. It will be fixed in a bit.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-18 16:53:19 +00:00
Stefan Reinauer e26d66e9dd fix handling of mkelfImage'd binaries 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-07-11 09:04:52 +00:00
Stefan Reinauer 75d1b24537 add support for EFST F49B002UA (untested) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2336 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-30 20:07:50 +00:00
Ronald G. Minnich 707097fc1c fix interrupt for f5 (ehci) 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-27 02:26:06 +00:00
Ronald G. Minnich aad235e906 changes per steve goodrich. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2334 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-27 01:38:17 +00:00
Stefan Reinauer 0a683fa9c7 create valid xmlfiles that pass xmllint 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-26 16:51:06 +00:00
Stefan Reinauer 6472a0e274 add support for PMC 49FL002 as used in the RD1-PMC2 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-25 09:56:45 +00:00
Ronald G. Minnich 92e8b809b4 fix typo on duplicate line. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-24 14:46:26 +00:00
Stefan Reinauer 5560a34c88 fix compilation of s2892. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-23 20:10:21 +00:00
Ronald G. Minnich 53a00b7138 match settings per steve goodrich. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-23 03:39:10 +00:00
Ronald G. Minnich 88fb1a6c37 set up interrupt values for the southbridge, and add a function to 
manage them. Make pci_level_irq global. Add value settings for OLPC
rev_a board. Comment out no-longer-needed code in olpc mainboard.c 
-- it is replaced by the settings in Config.lb, and the support
in cs5536.c


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-22 04:37:27 +00:00
Ronald G. Minnich 9d0b30dd2b Fixes from AMD. Tested to build on rumba and olpc, and builds. 
Tested to booting linux on olpc, and boots. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-20 03:53:54 +00:00
Stefan Reinauer 1f96360315 delete two empty files 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-18 07:44:45 +00:00
Stefan Reinauer 3951027f57 * delete two empty files 
* commit SMM lock code.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-18 07:41:48 +00:00
Ronald G. Minnich 2d7bb59018 fix idiiot typo I did not catch. 
add support for conditional enable of uarta interrupt.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-18 02:28:07 +00:00
Ronald G. Minnich 48415d5cf6 add irq mapper support for OLPC and other boards that need this mapping 
done for the gx2 north. tested on OLPC. 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-18 01:29:42 +00:00
Stefan Reinauer 6ab0fa9fed add k8 processor name handling as required by the k8 revision guide. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-14 23:22:04 +00:00
Stefan Reinauer f560285bd5 new flash part 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2321 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-14 15:58:41 +00:00
Ronald G. Minnich fd14d4414a remove erroneous cache disable. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-14 13:56:28 +00:00
Ronald G. Minnich 73c92a4a7c ron forget an svn add. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-12 20:37:33 +00:00
Ronald G. Minnich 90dc0db6de Get rid of #if 01 and debug prints that are compiled out. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-12 20:36:51 +00:00
Ronald G. Minnich 878a6696ba add a 1M target for big roms 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-11 03:03:56 +00:00
Ronald G. Minnich fb93749642 changes from AMD for making OLPC video work. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-10 22:57:15 +00:00
Ronald G. Minnich 890ee09a32 further development of OLPC. Set vsm size to 35k. add PCI IRQ for USB. 
Set linuxbios size to 28k. Drop debug level to 8.



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-06-08 14:19:49 +00:00
Stefan Reinauer 192b7bc445 add full xml logging to abuild to work on the complete information 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2314 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-27 00:22:02 +00:00
Stefan Reinauer 2d1fe3700e fix two mainboards that have been broken by someone who does not use abuild.sh 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-26 16:23:00 +00:00
Ronald G. Minnich b5fcfdbf89 add DK8HTX support. 
VSAs now required to be nrv2 compressed


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-25 22:08:23 +00:00
Stefan Reinauer d0cffada3c fix broadcom/blast, tyan/s2735, tyan/s2891, tyan/s2895 broken by r2307 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-25 12:40:03 +00:00
Yinghai Lu 9dd8d56192 co processor support with s2891 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 17:09:14 +00:00
Yinghai Lu 9a8e36da2d init the ECC for BSP and AP at the same time. So reduce init cpus time 
from 2.1x to 1.1x or from 4x(SERIAL_CPU_INIT) to 1.1x  


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 17:02:17 +00:00
Yinghai Lu 2b396cdcf2 add option to decide to use onboard vga or addon card. 
CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 16:54:30 +00:00
Ronald G. Minnich bad9d105cf cleanup some of the compressed rom stream ugliness -- more to do! 
olpc and rumba can now boot linux out of flash. vsa was resized to 64K. 
olpc and rumba now used compressed payload -- thanks stefan!


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-18 03:07:16 +00:00
Ronald G. Minnich 5d573c28e7 Commit for IDE NAND FLASH 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-16 02:51:16 +00:00
Ronald G. Minnich 98e904ea7c OLPC now builds and works just fine. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-15 04:44:15 +00:00
Ronald G. Minnich b9a335cb9b correct it, finally. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-12 20:05:08 +00:00
Ronald G. Minnich 6084160f2d memory size in cf07 
goodrich pll code
disable havedmi


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-12 18:42:34 +00:00
Ronald G. Minnich 437f28ece9 Fix an error in the config files. 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-09 05:25:31 +00:00
Ronald G. Minnich 49a89f19f2 Use a real variable to configure rom base for vsa ... 
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
 2006-05-06 02:54:45 +00:00