Commit graph

305 commits

Author SHA1 Message Date
Kyösti Mälkki
7580e4f3d2 AGESA: Remove leftover s3resume include
Change-Id: I7a1574259f73a52b66d03c686ae8ab70345c36ed
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18586
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-07 01:11:17 +01:00
Kyösti Mälkki
50bb68f2b6 AGESA fam14: Sanitize headerfile
This file is only static defines.

Change-Id: Id50a0eba1ce240df36da9bd6b2f39a263fa613df
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18585
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-03-07 01:10:57 +01:00
Kyösti Mälkki
c3c407c62c AGESA: Remove leftover agesawrapper include
Change-Id: Ib37989ee7535e59b1903537995f8383d8b04387c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18584
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-03-07 01:10:39 +01:00
Marshall Dawson
a8025db49f amd-based mainboards: Fix whitespace in _PTS comments
Correct tabs that were intended as spaces.

Change-Id: Idcf33d829f87a866b5ed880527102918d5b93842
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/17905
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-12-26 17:39:00 +01:00
Kyösti Mälkki
3a0cb458dc cpu/amd/mtrr.h: Drop excessive includes
Change-Id: Id404bdab1f2361f1e7d20f7ee72111971863dddf
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17736
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-06 20:55:11 +01:00
Kyösti Mälkki
4607cacf30 cpu/x86/msr.h: Drop excessive includes
Change-Id: Ic22beaa47476d8c600e4081fc5ad7bc171e0f903
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17735
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-06 20:54:31 +01:00
Kyösti Mälkki
59e0334207 AGESA: Switch to MMCONF_SUPPORT_DEFAULT
Vendorcode always does PCI MMCONF access once it is
enabled via MSR.

In coreboot proper, we don't give opportunity to make
pci_read/write calls before PCI MMCONF is enabled via MSR.
This happens early in romstage amd_initmmio() for all cores.

Change-Id: If31bc0a67b480bcc1d955632f413f5cdeec51a54
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17533
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01 05:49:09 +01:00
Kyösti Mälkki
7d25651ed3 AGESA f14: Consolidate early P-states setting
Change-Id: I3feed296b6ff9908e783c1221a8f61d9c548fef4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17564
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01 05:47:18 +01:00
Kyösti Mälkki
036a581b8f AGESA f14: Consolidate XIP cache
Do this like fam15tn to reduce code duplication.

Change-Id: I064fd27b85be7fb0c9d6918a84fc6f9b17065534
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17563
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-01 05:46:54 +01:00
Elyes HAOUAS
f2fcf22d22 src/mainboard: Remove unnecessary whitespace
Change-Id: I35cb7e08d5233aa5a3dbb4631ab2ee4dc9596f98
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16849
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-07 18:06:14 +02:00
Elyes HAOUAS
75b2237473 mainboard/*/*/*/usb.asl: Use tabs for indents
Change-Id: Id46a0c4ca59dc7224c2eedd674ea3a5486509de1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16824
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-01 08:38:34 +02:00
Elyes HAOUAS
57a3cd21f1 mainboard/lippert: Use tabs for indents
Change-Id: If16d55e4ba0702176dc61524915d215ea46c14ba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16686
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-26 13:22:23 +02:00
Elyes HAOUAS
d4c89e40c0 mainboard/lippert/frontrunner-af: Use tabs for indents
Change-Id: Id8b60d32d5bdaaa6c693dcf5db992ed975cc2400
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16685
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-23 20:46:04 +02:00
Elyes HAOUAS
62d4b0062b mainboard/lippert/toucan-af: Use tabs for indents
Change-Id: Ibd1fa89b450d52691dfef5616712f03fd675f123
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16684
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-23 20:45:51 +02:00
Elyes HAOUAS
a5aad2ed68 src/mainboard/lenovo-winent: Add space around operators
Change-Id: Iab2a879ebdea9d93ef5eb7e3abf875036c1e1cb4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16641
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:55:12 +02:00
Nico Huber
d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector
code) the reboot counter stored in `reboot_bits` isn't reset on a reboot
with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR
enabled, later stages (e.g. payload, OS) have to clear the counter too,
when they want to switch to normal boot. So change the bits to (h)ex
instead of (r)eserved.

To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also
remove all occurences of the obsolete `last_boot` bit that have sneaked
in again since 24391321 (mainboard: Remove last_boot NVRAM option).

Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/16157
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-17 00:27:42 +02:00
Elyes HAOUAS
8ab989e315 src/mainboard: Capitalize ROM, RAM, CPU and APIC
Change-Id: Ia1f24d328a065a54975adde067df36c5751bff2d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15987
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-14 19:06:25 +02:00
Paul Menzel
95fe8fb1e0 mainboard: Format irq_tables.c
Run the command below to format the files `irq_tables.c` of (mostly AMD)
mainboards correctly with GNU indent 2.2.10.

```
$ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l
```

Fix up the following two checkpatch.pl errors manually.

```
ERROR: that open brace { should be on the previous line
#1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129:
+			uint8_t reg[8] =
+			    { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 };

ERROR: that open brace { should be on the previous line
#1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131:
+			uint8_t irq[8] =
+			    { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 };

```

This is needed, so that follow-up commits, fixing checkpatch.pl errors
and warnings, won’t run into conflicts with the git commit hooks, when
for example, spaces instead of tabs are used for indentation.

Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/15932
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-31 18:44:00 +02:00
Martin Roth
4c72d3612b Remove extra newlines from the end of all coreboot files.
This removes the newlines from all files found by the new
int-015-final-newlines script.

Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15975
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-31 18:19:33 +02:00
Kyösti Mälkki
5276941c8b AMD boards: Fix romstage main() declaration
Boards incorrectly used intel include file for AMD board.

Change-Id: I6d3172d1aa5c91c989a6ef63066a7cd6f70013f5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15232
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-18 20:01:48 +02:00
Kyösti Mälkki
062ef1cca6 AGESA boards: Split dispatcher to romstage and ramstage
The way dispatcher table is set up prevents linker from
optimizing unused code away, we currently have raminit in ramstage.

Optimize this manually by configuring AGESA_ENTRY booleans for
romstage and ramstage separately. This will remove references in
FuncParamsInfo and DispatchTable -arrays.

All boards now include multi-core dispatcher, it has minimal footprint:
  AGESA_ENTRY_LATE_RUN_AP_TASK

ACPI S3 support depends on HAVE_ACPI_RESUME being enabled:
  AGESA_ENTRY_INIT_RESUME
  AGESA_ENTRY_INIT_LATE_RESTORE
  AGESA_ENTRY_INIT_S3SAVE

Disabled for all boards as it was not used:
  AGESA_ENTRY_INIT_GENERAL_SERVICES

Change-Id: I7ec36a5819a8e526cbeb87b04dce4227a1689285
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14417
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-04 23:44:33 +02:00
Kyösti Mälkki
53052fe5ee AGESA boards: Relocate platform memory config
File buildOpts.c is a can of worms, pull platform memory
configuration in to OemCustomize.c. This array should be
assigned at runtime instead of linking a modified defaults
table.

Change-Id: I73d9d3fbc165e6c10472e105576d7c40820eaa6a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14528
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10 13:47:08 +02:00
Kyösti Mälkki
a5d72a3170 AGESA boards: Rename files containing OEM configuration
There are other things besides PCIe port configuration that
require board specific hooks.

Change-Id: I0923651487b9ed5f6f7569ce08e02d993fa5f976
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14527
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10 13:39:26 +02:00
Vladimir Serbinenko
01586063ab ASL: Fix HPBA shadowing.
Store (HPBA, HPBA) had no effect. Rename one of HPBA to avoid shadowing.

Change-Id: I54bfa7bcb3e05c28fe8a257825af56527dbf663e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13622
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-09 19:57:41 +01:00
Martin Roth
f77516cb6d ACPI: Work around IASL warning reading/writing same register
The newer versions of IASL are unhappy when an operator
has the same object as both source and destination.

The warning can be completely disabled with a command
line argument, but in general, I'd really rather not
just disable warnings.

The bits in this register are write 1 to clear, so reading and
writing the same register is what we want to do.  Instead, store
it in a temporary register then write it in a second operation.

Fixes warning:
dsdt.aml   1396:  Store(PWST, PWST)
Warning  3023 -                 ^ Duplicate value in list
(Source is the same as Target)

Change-Id: I52d73d4431db237be83016d67cd397f31b53d9c6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12691
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-10 16:32:21 +01:00
Martin Roth
91d9cbc2fb ACPI: Fix IASL Warning about unused method for _OSI check
According to the ACPI Spec for CondRefOf, the result argument is
optional.  In all of these locations, it was getting set but not
used, creating a warning in new versions of IASL.  Since it's
an optional argument, just remove it.

dsdt.aml     22:   if(CondRefOf(\_OSI,Local1))
Warning  3144 -                           ^
Method Local is set but never used (Local1)

Change-Id: I07f49ac5a3708838d1c4a7216dfb11acc415c881
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12692
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-10 16:31:35 +01:00
Martin Roth
c7b26c381c lippert/frontronner-af & toucan-af: Fix IASL warnings
Not all the paths through the _OSC method returned a value.  According
to the ACPI spec (5.0 & 6.0), bit 2 needs to be set for an unrecognized
GUID.

Fixes warnings for both platforms:
dsdt.aml 1143:  Method(_OSC,4)
Warning  3115 -          ^ Not all control paths return a value (_OSC)
dsdt.aml 1143:  Method(_OSC,4)
Warning  3107 -          ^ Reserved method must return a value
(Buffer required for _OSC)

Change-Id: Ibaf27c5244b1242b4fc1de474c371f54f930dcb6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12530
Tested-by: build bot (Jenkins)
Reviewed-by: Jens Rottmann <JRottmann@LiPPERTembedded.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 16:10:06 +01:00
Martin Roth
77c67b3d30 IASL: Enable warnings as errors
We've actually got more warnings now than when I first tested IASL
warnings as errors.  Because of this, I'm adding it with the option
to have it disabled, in hopes that things won't get any worse as we
work on fixing the IASL warnings that are currently in the codebase.

- Enable IASL warnings as errors
- Disable warnings as errors in mainboards that currently have warnings.
- Print a really obnoxious message on those platforms when they build.
***** WARNING: IASL warnings as errors is disabled!  *****
*****          Please fix the ASL for this platform. *****

Change-Id: If0da0ac709bd8c0e8e2dbd3a498fe6ecb5500a81
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10663
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-23 18:48:58 +01:00
Patrick Georgi
47b6a825a7 mainboard/**/irq_tables.c: Remove reference to getpir
The obsolete and removed getpir utility remarked in its output that the
data is autogenerated. The tool was removed because it wasn't very
reliable, so there's no need to point that anymore.

Change-Id: I5d624931ba7872b1fefa8fa3c270ae7367e069fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12354
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-11-10 14:11:06 +01:00
Timothy Pearson
24391321e8 mainboard: Remove last_boot NVRAM option
The last_boot NVRAM option was deprecated and removed in
commit 3bfd7cc6.  Remove the last_boot option from all
affected mainboards to eliminate user confusion.

Change-Id: I7e201b9cf21dfe5dda156785bad078524098626d
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12316
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
2015-11-05 02:21:52 +01:00
Patrick Georgi
a73b93157f tree: drop last paragraph of GPL copyright header
It encourages users from writing to the FSF without giving an address.
Linux also prefers to drop that and their checkpatch.pl (that we
imported) looks out for that.

This is the result of util/scripts/no-fsf-addresses.sh with no further
editing.

Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/11888
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-31 21:37:39 +01:00
Stefan Reinauer
dd132a5d2d AMD mainboards: Fix 64bit BiosCallOuts.c
Change-Id: I0f3297dff47dfb44da034ac6f305dcf1981b9de1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11080
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-30 18:31:35 +01:00
Tobias Diedrich
a4d179af56 amd/acpi: Clean up SMBus references.
Replace the AMD SMBus section with the equivalent SB800 smbus.asl
include or remove already commented-out sections.

Verified by running the cpp preprocessor over the DSDTs and diffing the
results against this patch.

The only change is in src/mainboard/siemens/sitemp_g1p1/dsdt.asl, where
someone added RADD and SADD to the OpRegion, but those are unused, so
removing them is fine.

Change-Id: I074c8a1ed1c9a944d4988752bd0fc42c199c766c
Signed-off-by: Tobias Diedrich <ranma+coreboot@tdiedrich.de>
Reviewed-on: http://review.coreboot.org/10618
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-24 00:17:50 +02:00
Felix Held
421b47e050 SB800-mainboards: use write8 to disable unused GPP CLK
don't use non-volatile pointers for MMIO access

Change-Id: I9f38012a806e43f2535265f1d25537c59b53904e
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/12081
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-10-23 20:44:06 +02:00
Aaron Durbin
dc9f5cd546 coreboot: introduce commonlib
Instead of reaching into src/include and re-writing code
allow for cleaner code sharing within coreboot and its
utilities. The additional thing needed at this point is
for the utilities to provide a printk() declaration within
a <console/console.h> file. That way code which uses printk()
can than be mapped properly to verbosity of utility parameters.

Change-Id: I9e46a279569733336bc0a018aed96bc924c07cdd
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11592
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-09-22 21:21:34 +00:00
Stefan Reinauer
23ec0a570e lippert/frontrunner-af: 64bit fixes
Change-Id: Ia764798c8b58497e2b453bd000dd06816c28f98f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10600
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-23 22:23:27 +02:00
Stefan Reinauer
03c6ab5ea6 lippert/toucan-af: 64bit fixes
Change-Id: I9e7f78587b9d6e87cf77757654da9145d4187625
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10599
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-23 22:08:41 +02:00
Elyes HAOUAS
52648623e0 Remove empty lines at end of file
Used command line to remove empty lines at end of file:
find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \;

Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: http://review.coreboot.org/10446
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-08 00:55:07 +02:00
Kyösti Mälkki
d0e212cdce devicetree: Discriminate device ops scan_bus()
Use of scan_static_bus() and tree traversals is somewhat convoluted.
Start cleaning this up by assigning each path type with separate
static scan_bus() function.

For ME, SMBus and LPC paths a bus cannot expose bridges, as those would
add to the number of encountered PCI buses.

Change-Id: I8bb11450516faad4fa33b8f69bce5b9978ec75e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8534
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
2015-06-04 11:19:01 +02:00
Kyösti Mälkki
9d035fa1f7 AGESA binaryPI boards: Drop annoying commentary
Same comments were already removed for the latest board, the amd/lamar.

Change-Id: Ie244f838409c567c11f7444c9cf17de72e49dbb0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10283
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-05-24 05:34:13 +02:00
Patrick Georgi
b890a1228d Remove address from GPLv2 headers
As per discussion with lawyers[tm], it's not a good idea to
shorten the license header too much - not for legal reasons
but because there are tools that look for them, and giving
them a standard pattern simplifies things.

However, we got confirmation that we don't have to update
every file ever added to coreboot whenever the FSF gets a
new lease, but can drop the address instead.

util/kconfig is excluded because that's imported code that
we may want to synchronize every now and then.

$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} +
$ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} +
$ find * -type f
	-a \! -name \*.patch \
	-a \! -name \*_shipped \
	-a \! -name LICENSE_GPL \
	-a \! -name LGPL.txt \
	-a \! -name COPYING \
	-a \! -name DISCLAIMER \
	-exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} +

Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/9233
Tested-by: build bot (Jenkins)
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2015-05-21 20:50:25 +02:00
Kyösti Mälkki
6be1a8bf08 AGESA: Drop unused AGESA_MEM_TABLE
These tables are not referenced anywhere, thus all
comments about adjustments are void.

Also drop stub AgesaReadSpd that is all commented out.

Change-Id: I12233ea0dc4baaf36a75f359c52cc59c9b6dad79
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/10143
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-05-10 18:44:04 +02:00
Stefan Reinauer
139e1067b6 kconfig: automatically include mainboards
This change switches all mainboard vendors and mainboards
to be autoincluded by Kconfig, rather than having to be mentioned
explicitly.

This means, vendor and mainboard directories are becoming more
"drop in", e.g. be placed in the coreboot directory hierarchy
without having to modify any higher level coreboot files.

The long term plan is to enable out of tree mainboards / components
to be built with a given coreboot version (given that the API did
not change)

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: Ib68ce1478a2e12562aeac6297128a21eb174d58a
Reviewed-on: http://review.coreboot.org/9295
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-04-18 08:31:08 +02:00
Kyösti Mälkki
82fbda76c9 AGESA: Use same HeapManager for all BiosCallOuts
We do not allow platforms to mess around with memory layout.

Change-Id: I316ff522c8833fa3b7ad20f2c5a9cae21f4174d8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8604
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-07 21:22:44 +01:00
Alexandru Gagniuc
fb9d4caf16 mainboard: Do not redefine DRIVERS_PS2_KEYBOARD Kconfig variable
Change-Id: Icc603dfe92360d978221a25ad28517da43942bea
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8498
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-05 09:33:47 +01:00
Timothy Pearson
94efd19517 mainboard/cmos: Kill off unused boot_* parameters
Change-Id: I19d6b56e3ac5e6e7946648b97c86a223b748e3bd
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8460
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-16 09:24:14 +01:00
Timothy Pearson
c0ae684d16 mainboard/cmos: Move ECC variables out of fallback mechanism byte
Change-Id: Icebc12d8f83494150a7bdd3adcc168d7b48b2e68
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8458
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-02-16 09:23:44 +01:00
Timothy Pearson
9b68f05fc8 mainboard/cmos: Delete obsolete commented parameters
Change-Id: Iccad79c142a7fcf89dd0fbebe8c07ad9ef019e91
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8459
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-16 09:23:02 +01:00
Kevin Paul Herbert
bde6d309df x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.

Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
2015-02-15 08:50:22 +01:00
Kyösti Mälkki
78c5d584a0 ACPI: Add acpi_is_wakeup_s3() for romstage
This replaces acpi_is_wakeup_early().

Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8187
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-10 13:53:51 +01:00