Yuchen Huang
ec39cb3a80
soc/mediatek/mt8192: add clkbuf and srclken_rc MT6359P driver
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Add clkbuf and srclken_rc init for low power.
Reference datasheet:
Document No: RH-D-2018-0205.
TEST=boot asurada
Signed-off-by: Ran Bi <ran.bi@mediatek.com>
Change-Id: I947bf14df7a307bf359c590c2a20265882b3f1be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-01-19 04:02:07 +00:00
Huayang Duan
68cb9ed068
soc/mediatek/mt8192: Save dramc shuffle result after calibration
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Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: Icfd0923d4bd34ebb082e00e87f262b0d908fe342
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44714
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-01-19 01:32:31 +00:00
Huayang Duan
7ce9883058
soc/mediatek/mt8192: Add dramc ac timing setting
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Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I10e704868e4cd36a938a669879bb1a8632e73e1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-01-19 01:31:14 +00:00
Huayang Duan
c37b9aa9f0
soc/mediatek/mt8192: Get DDR base information after calibration
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After calibration, we can get ddr vendor id or density info from
MR5 or MR8, this helps to make sure the DDR HW is as we expected.
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: Ie62948368716d309aab8149372b2b6093fc33552
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44712
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-01-19 01:30:55 +00:00
Nico Huber
58ba83fe74
nb/intel/gm45: Reserve MMIO and firmware memory below 1MiB
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It looks like we didn't care to reserve the VGA MMIO (a & b segments)
and the c..f segments, initially. It was probably never needed until
the new resource allocator that will make use of any unclaimed space.
Change-Id: Iebdae64914d9f8301cafc67a5aba933c11294707
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-18 23:01:28 +00:00
Kyösti Mälkki
5fde1b7669
mb/apple,lenovo,roda: Drop reference to OSYS
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It is claimed getac/p470 has this implemented and not
as a TODO.
Change-Id: Ifa9ec5bcb8b25b6334b589e4bc7bcb915e85e349
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49349
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-18 18:05:02 +00:00
Kyösti Mälkki
3b947e2094
mainboards: Move get_cst_entries()
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Change-Id: I02cfbcb7a340bd574290e4ac486010fc4cbcd3be
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49351
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-18 18:04:28 +00:00
Kyösti Mälkki
66c6413c69
ACPI: Refactor ChromeOS specific ACPI GNVS
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The layout of GNVS has expectation for a fixed size
array for chromeos_acpi_t. This allows us to reduce
the exposure of <chromeos/gnvs.h>.
If chromeos_acpi_t was the last entry in struct global_nvs
padding at the end is also removed.
If device_nvs_t exists, place a properly sized reserve for
chromeos_acpi_t in the middle.
Allocation from cbmem is adjusted such that it matches exactly
the OperationRegion size defined inside the ASL.
Change-Id: If234075e11335ce958ce136dd3fe162f7e5afdf7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48788
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-18 18:02:27 +00:00
Zheng Bao
c4a6628a6f
mb/amd/majolica: Add option of ROM size
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Change-Id: I07740285658aa098d3785cbead173b2f3acca42d
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-18 14:21:46 +00:00
Elyes HAOUAS
1bc87143a4
device/oprom/x86emu/sys.c: Use __func__
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Change-Id: Ia278e1f2d1162fa9541bf0cead3b2734144190be
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 09:44:02 +00:00
Patrick Georgi
8e400f0cca
Revert "nb/intel/gm45/gm45.h: Remove duplicated include"
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This reverts commit 27af8a7e5d
.
Reason for revert: This depends on CB:45517 which hasn't landed yet.
Change-Id: I2a6fbf54cfe01bf25e9ea8da84f6f2a17418f0ae
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49647
Tested-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 09:40:00 +00:00
Elyes HAOUAS
2e2f72ec8a
drivers/ocp/dmi/Kconfig: Set FRU_DEVICE_ID depend on OCP_DMI
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This will remove "CONFIG_FRU_DEVICE_ID=0" from ".config" when unused.
Change-Id: Ic50de165c1f3de3886d3cd1ae66853c9fad35ed2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49571
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:50:46 +00:00
Elyes HAOUAS
2826cdccd1
drivers/ti/sn65dsi86bridge: Add parentheses to Macros
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Change-Id: I2f3a9885171995633d0bfb22b7ff8ef8a68683b8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:48:09 +00:00
Elyes HAOUAS
1e4779e87e
soc/intel/braswell/chip.c: Use __func__
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Change-Id: I96b302f5a1f10daaed017a2453d1568a2e49e4ad
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:47:24 +00:00
Elyes HAOUAS
ce5b1d1ec7
mb/ocp/tiogapass/ramstage.c: Remove duplicated include
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Change-Id: I6549ad6704c62b968ff9eb59cc698107c0120fb8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:46:47 +00:00
Elyes HAOUAS
5edd51f3c2
security/intel/stm/StmPlatformSmm.c: Remove repeated word
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Change-Id: I45adc4622f2d3358c703259931bafc4511395a5a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49529
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:46:13 +00:00
Elyes HAOUAS
f669c81cf4
northbridge/intel/x4x/dq_dqs.c: Remove repeated word
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Change-Id: Iee24c6bf82ab6ff6691707ed0c388cfe492cc925
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49523
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-18 07:45:55 +00:00
Elyes HAOUAS
4ff66dc08f
soc/intel/xeon_sp/uncore.c: Remove duplicated include
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Change-Id: I2ac1035585b32ba65d0725067cff0c12c9f748c1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49570
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:45:05 +00:00
Elyes HAOUAS
266c313bc1
soc/intel/xeon_sp/skx/soc_acpi.c: Remove duplicated include
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Change-Id: Icf4247a0a5fb7950c69c8f229a6629a4fa6980f7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2021-01-18 07:44:39 +00:00
Elyes HAOUAS
c36650143b
drivers/maxim/max77686/max77686.h: Remove repeated word
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Change-Id: Iac77f401d80027231f8b6a3449cb57abf3d337ed
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:39:21 +00:00
Elyes HAOUAS
0afaff2611
lib/device_tree.c: Remove repeated word
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Change-Id: Id5279587231c539bd3ffc75b75b29d88ef30e56a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:38:49 +00:00
Elyes HAOUAS
ba4dbf8c4c
soc/amd/stoneyridge/romstage.c: Remove repeated word
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Change-Id: I38974b532f41830f49b54444d98e6bd7aa417aba
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:38:33 +00:00
Elyes HAOUAS
4537332d64
northbridge/intel/gm45/bootblock.c: Remove repeated word
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Change-Id: Ie3bfdb27aa7c981a500e82b6a6958576e0048bcd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49532
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:38:22 +00:00
Elyes HAOUAS
1550469234
ec/google/chromeec/ec_commands.h: Remove repeated word
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Change-Id: I87d5a5fa584b4250bc8b532c046e6bd070e33e81
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49531
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:38:09 +00:00
Elyes HAOUAS
6538d91bc3
northbridge/intel/x4x/raminit_ddr23.c: Remove repeated word
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Change-Id: I9763499ad5cf0395c83770908a277f089ceed475
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:37:17 +00:00
Elyes HAOUAS
5345a3841d
include/edid.h: Remove repeated word
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Change-Id: Ia6dfc89e575e1a47f980a008ae7334fc21afde89
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49528
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:37:04 +00:00
Elyes HAOUAS
2d634c9069
security/vboot/secdata_tpm.c: Remove repeated word
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Change-Id: Idc17a4305398defd19e7f6ba2fc00bf69af34c4b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49526
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:36:49 +00:00
Elyes HAOUAS
98d6f33c0b
northbridge/intel/sandybridge/bootblock.c: Remove repeated word
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Change-Id: I9e723e1d31b093a4781413efe7f290a295b833dc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:36:31 +00:00
Elyes HAOUAS
5323bf422f
include/memrange.h: Remove repeated word
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Change-Id: Id010c72bbbb302f1756a53a228fa0bdd7ec7654b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49522
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:36:18 +00:00
Elyes HAOUAS
3ef8e21f33
soc/intel/broadwell/bootblock.c: Remove repeated word
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Change-Id: I3aec07d782e4315120a4365a65bdbcbf4a22e6f2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:36:04 +00:00
Elyes HAOUAS
26e880e8a3
soc/intel/common/block/include/intelblocks/pmc_ipc.h: Remove repeated word
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Change-Id: I646583f7f0d0e0f6a91bc99b7edda964337d837e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49520
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:35:48 +00:00
Elyes HAOUAS
9148cd145f
soc/intel/common/block/itss/itss.c: Remove repeated word
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Change-Id: Icc4954bcc1540f1935b0e34107febb4a1e947a36
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:35:33 +00:00
Elyes HAOUAS
59ab203f1c
soc/intel/skylake/chip.h: Remove repeated word
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Change-Id: Id5bf9255e9a16a4f311e3b15eb77ad6e4bb13f66
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:35:14 +00:00
Elyes HAOUAS
1a8d0e5886
soc/nvidia/tegra124/spi.c: Remove repeated word
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Change-Id: I0018ea16f304a0d2cedfbd55525ecabbf2d89aa1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:35:02 +00:00
Elyes HAOUAS
b9d95c5f64
soc/nvidia/tegra210/spi.c: Remove repeated word
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Change-Id: Iea0c973b2bd493eb69ef76289b5b4fc66ac622f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:34:48 +00:00
Elyes HAOUAS
a833698280
ec/google/chromeec/ec.h: Remove repeated word
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Change-Id: I7f567f2b4c582e4b2bb102ef0e0f68c5bf6cfb9e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49515
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:34:34 +00:00
Elyes HAOUAS
4041772535
drivers/intel/gma/intel_bios.h: Remove repeated word
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Change-Id: I5866a5e3240e49119e29f728202b33dd82ceaf77
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49514
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:34:12 +00:00
Elyes HAOUAS
cb0584ecdb
device/xhci.c: Remove repeated word
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Change-Id: Ia1648bd7ba4858268ca5f1a5c7b42b7de717d3d6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49513
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:33:25 +00:00
Elyes HAOUAS
0ce74161ad
device/pci_device.c: Remove repeated word
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Change-Id: Ia6936675684e3eaf2a57e2d28e465b1f0768249b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49512
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:33:13 +00:00
Elyes HAOUAS
cc2c5c9ec7
cpu/x86/smm/smm_module_loaderv2.c: Remove repeated word
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Change-Id: I712fca09b1618017412a3d91f81627ec876f2894
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49511
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:31:46 +00:00
Elyes HAOUAS
07f11db69c
cpu/x86/mtrr/earlymtrr.c: Remove repeated word
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Change-Id: I7e7570ff6a4319a0cf583ae5b76e7c24f0241509
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49510
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:31:23 +00:00
Elyes HAOUAS
398df49d3f
cpu/intel/smm/gen1/smmrelocate.c: Remove repeated word
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Change-Id: I478f8ab0cf0a4004b4d7294efb330dc800253e4a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49509
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:31:06 +00:00
Elyes HAOUAS
27af8a7e5d
nb/intel/gm45/gm45.h: Remove duplicated include
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Change-Id: Iabd6c69cd4c28f0015d4cf1f95d5ae0b6dc8b47e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49568
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
2021-01-18 07:30:48 +00:00
Elyes HAOUAS
6a2ca474a4
soc/amd/common/block/smi/smi_util.c: Remove repeated word
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Change-Id: Ifeac919ac7214c1baf877a36fd3d57636fc83563
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-18 07:29:48 +00:00
Eric Lai
f8248f38a1
soc/intel/alderlake: Update PCH and CPU PCIe RP table
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According ADL EDS to update the PCH and CPU PCIe RP table.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Idcc21d8028f51a221d639440db4cf5a4e095c632
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-01-18 07:28:51 +00:00
Eric Lai
de2ab41fc4
soc/intel/common: Move L1_substates_control to pcie_rp.h
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L1_substates_control is common define. Move out of soc level.
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I54574b606985e82d00beb1a61cce3097580366a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49295
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-01-18 07:28:32 +00:00
Matt DeVillier
cb18524b4a
mb/purism/librem_cnl: Update HDA verbs for Librem Mini
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Disable all NIDs other than those for the front combo jack.
Adjust attributes to match jack physical location, appearance, etc.
Correct group number for verbs for HDMI output.
Test: run hdajackretask, verify NID characteristics correct for each
verb. Verify headphone detection and output functional.
Change-Id: If9fca5d9795d56bd38c8ea47f8de985c14ac8fab
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49464
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-18 07:28:01 +00:00
Furquan Shaikh
ea3e6b06cc
soc/intel/common/pcie: Allow pcie_rp_group table to be non-contiguous
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In case of CPU PCIe RPs, the RP numbers might not be contiguous for
all the functions in a slot.
Example: In ADL, RP1 is 00:06.0, RP2 is 00:01.0 and RP3 is 00:06.2 as
per the FSP expectations.
Hence, this change updates the defintion of `struct pcie_rp_group` to
include a `start` member which indicates the starting PCI function
number within the group. All common functions for PCIe RP are
accordingly updated to take the `start` member into account.
Thus, in the above example, ADL can provide a cpu_rp_table as follows:
{
{ .slot = PCIE_SLOT_6, .start = 0, .count = 1 },
{ .slot = PCIE_SLOT_1, .start = 0, .count = 1 },
{ .slot = PCIE_SLOT_6, .start = 2, .count = 1 },
}
Since start defaults to 0 when uninitialized, current PCH RP group
tables don't need to be updated.
Change-Id: Idf80a0f29e7c315105f76a7460c8e1e8f9a10d25
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49370
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-18 07:27:43 +00:00
Jeremy Soller
7cc513557d
ec/system76/ec: Add fan and temperature reporting
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Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Change-Id: Iee19e7518ffaacd9a847cb6d28c839d4ec464514
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-18 07:27:26 +00:00
Jakub Czapiga
a2b21c23d5
tests: Add lib/imd_cbmem-test test case
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ie893b5e8fc91c230ff96a14146085de16d78b1c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-01-18 07:27:16 +00:00