Commit Graph

19790 Commits

Author SHA1 Message Date
Duncan Laurie f235a9b1b0 drivers/i2c/tpm/cr50: Improve data handling and function names
Unify the function names to be consistent throughout the driver
and improve the handling while waiting for data available and
data expected flags from the TPM.

BUG=chrome-os-partner:53336

Change-Id: Ie2dfb7ede1bcda0e77070df945c47c1428115907
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16668
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:45:24 +02:00
Duncan Laurie d3920e71d6 drivers/i2c/tpm/cr50: Clean up locality functions
Clean up the mask and timeout handling in the locality functions
that were copied from the original driver.

BUG=chrome-os-partner:53336

Change-Id: Ifdcb3be0036b2c02bfbd1bcd326e9519d3726ee0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16667
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:45:09 +02:00
Duncan Laurie 510cb6a144 drivers/i2c/tpm/cr50: Rename i2c read/write functions
Rename the low-level functions from iic_tpm_read/write to
cr50_i2c_read/write to better match the driver name, and pass in the
tpm_chip structure to the low-level read/write functions as it will
be needed in future changes.

BUG=chrome-os-partner:53336

Change-Id: I826a7f024f8d137453af86ba920e0a3a734f7349
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16666
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:44:52 +02:00
Duncan Laurie 1dc036ce48 drivers/i2c/tpm/cr50: Clean up timeouts
Use two different timeouts in the driver.  The 2ms timeout is needed
to be safe for cr50 to cover the extended timeout that is seen with
some commands. The other at 2 seconds which is a TPM spec timeout.

BUG=chrome-os-partner:53336

Change-Id: Ia396fc48b8fe6e56e7071db9d74561de02b5b50e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16665
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:44:39 +02:00
Duncan Laurie 3727a8d909 drivers/i2c/tpm/cr50: Reduce max buffer size
Reduce the static buffer size from the generic default 1260
down to 64 to match the max FIFO size for the cr50 hardware
and reduce the footprint of the driver.

BUG=chrome-os-partner:53336

Change-Id: I6f9f71d501b60299edad4b16cc553a85391a1866
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16664
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:02:59 +02:00
Duncan Laurie 2ea13c8699 drivers/i2c/tpm: Split cr50 driver from main driver
Originally I thought it would be cleaner to keep this code in one
place, but as things continue to diverge it ends up being easier
to split this into its own driver.  This way the different drivers
in coreboot, depthcharge, and the kernel, can all be standalone
and if one is changed it is easier to modify the others.

This change splits out the cr50 driver and brings along the basic
elements from the existing driver with no real change in
functionality.  The following commits will modify the code to make
it consistent so it can all be shared with depthcharge and the
linux kernel drivers.

BUG=chrome-os-partner:53336

Change-Id: I3b62b680773d23cc5a7d2217b9754c6c28bccfa7
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16663
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:02:43 +02:00
Duncan Laurie dca223cb38 drivers/i2c/tpm: Move common variables to header
Move the common enums and variables to tpm.h so it can be
used by multiple drivers.

BUG=chrome-os-partner:53336

Change-Id: Ie749f13562be753293448fee2c2d643797bf8049
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/16662
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-21 10:02:17 +02:00
Martin Roth 8ea06512e6 Makefiles: update cbfs types from bare numbers to values
These values are found in util/cbfstool/cbfs.h.

Change-Id: Iea4807b272c0309ac3283e5a3f5e135da6c5eb66
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16646
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-21 09:36:11 +02:00
Martin Roth 2ab981b87e buildgcc: Update to acpica version 20160831
Change-Id: I3e3973e1c47505718cf73435156104ab73680441
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16387
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 22:20:38 +02:00
Martin Roth 03b9ecb2cf Makefile.inc: Add aliases for submodule updates to gitconfig target
Updating submodules seem to give people headaches, so this adds a pair
of git aliases to update them.

'git sup' updates the submodules to the latest versions, but leaves any
locally modified files.

'git sup-destroy' will remove the current submodules and re-initialize
them.  This deletes any local changes.

Change-Id: Id62a30d88b3b6d285b3f00555d7609509aa1561f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16573
Tested-by: build bot (Jenkins)
Reviewed-by: Omar Pakker
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 22:20:30 +02:00
Elyes HAOUAS a5aad2ed68 src/mainboard/lenovo-winent: Add space around operators
Change-Id: Iab2a879ebdea9d93ef5eb7e3abf875036c1e1cb4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16641
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:55:12 +02:00
Elyes HAOUAS 531b87ac4e src/mainboard/getac - kontron: Add space around operators
Change-Id: If3cdfdff60c92e3427f1b285e2bca92e2bb2a1cb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16640
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:54:45 +02:00
Elyes HAOUAS 04f8fd981f northbridge/amd/amdfam10: Improve code formatting
Change-Id: I86a252598666af635281eaa467020acb53d71c77
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16642
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:53:57 +02:00
Simon Glass 78c63860a6 selfboot: Move the usable-RAM check into a function
In preparation for making this check optional, move it into its own
function. load_self_segments() is already long and we don't want to make
it longer.

BUG=chrome-os-partner:56314
BRANCH=none
TEST=boot on gru and see that BL31 loads and runs correctly

Change-Id: If48d2bf485a23f21c5599670e77a7b8b098f1a88
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 2381e02efa2033857ac06acbc4f0c0dd08de1080
Original-Change-Id: I005e5e4d9b2136605bdd95e9060655df7a8238cb
Original-Signed-off-by: Simon Glass <sjg@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/381092
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16585
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-20 21:52:53 +02:00
Simon Glass 17c2b94ac1 arm_tf: Fix code style nits and comments
Tidy up a few things which look incorrect in this file.

BUG=chrome-os-partner:56314
BRANCH=none
TEST=build for gru

Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 434e9ceb5fce69b28de577cdc3541a439871f5ed
Original-Change-Id: Ida7a62ced953107c8e1723003bcb470c81de4c2f
Original-Signed-off-by: Simon Glass <sjg@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376848
Original-Commit-Ready: Simon Glass <sjg@google.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>

Change-Id: If8c283fe8513e6120de2fd52eab539096a4e0c9b
Reviewed-on: https://review.coreboot.org/16584
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:52:21 +02:00
Shunqian Zheng 386f084f97 gru/kevin: Decrease voltage for little cpu 1.5G to 1.15v
In kernel side we set 1.1v for 1.5G, even for coreboot RO,
a higher voltage could be safer, 1.2v now seems too high.

BRANCH=none
BUG=chrome-os-partner:56948
TEST=bootup

Change-Id: I852e0d532369aad51b12770e2efb01aacf6662ce
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 000b5c099373be2a1f83c020ba23a0e79ea78fab
Original-Change-Id: Iecc620deee553c61a330353ac160aa3a36f516df
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/380896
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16583
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:52:06 +02:00
Simon Glass 03cd118025 rockchip: spi: Improve SPI read efficiency
The SPI driver is quite slow at reading data. For example, with a 24MHz
clock on gru it achieves a read speed of only 13.9Mbps.

We can correct this by reading the status registers once, then reading as
many bytes as are available before checking the status registers again. It
seems likely that a status register read requires synchronizing with the
SPI FIFO clock domain, which takes a while.

BUG=chrome-os-partner:56556
BRANCH=none
TEST=run on gru and see the speed increase from 13.920 Mbps to 24.712 Mbps

Change-Id: I24aed0c9c6c5445634c4e056922afaee4e9a7b33
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 49c2fc20d7d7d703763e9b0a6f68313a349a84b9
Original-Change-Id: I42745f01f0fe069f6ae26d866004d36bb257e6b2
Original-Signed-off-by: Simon Glass <sjg@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376945
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16582
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:51:42 +02:00
Daisuke Nojiri 2b7a6019f2 Veyron: Increase bit-per-pixel to 32
This enhances gradation of some icons on vboot screens.

BUG=chrome-os-partner:56056
BRANCH=none
TEST=Booted Jerry

Change-Id: Ia19d585b69e7701040209e8bf0b8a6990a166c95
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 4e7a42c999673ebd89c5b30845a4a5ec93852166
Original-Change-Id: I126cb7077c834e1a8b0a625a592dce8789b5876c
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376884
Reviewed-on: https://review.coreboot.org/16581
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:51:28 +02:00
Julius Werner f52288f935 google/gru: Fix up PWM regulator ranges
We did yet another small adjustment to the PWM regulator ranges for
Kevin rev6... this patch reflects that in code. Also rewrite code and
descriptions to indicate that these new ranges are not just for Kevin,
but also planned to be used on Gru rev2 and any future Gru derivatives
(which as I understand it is the plan, right?).

BRANCH=None
BUG=chrome-os-partner:54888
TEST=Booted my rev5, for whatever that's worth...

Change-Id: Id78501453814d0257ee86a05f6dbd6118b719309
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 4e8be3f09ac16c1c9782dee634e5704e0bd6c7f9
Original-Change-Id: I723dc09b9711c7c6d2b3402d012198438309a8ff
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/379921
Original-Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/16580
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:51:10 +02:00
Daisuke Nojiri dd6ab34d5b Gru: Increase bit-per-pixel to 32
This enhances gradation of some icons on vboot screens.

BUG=chrome-os-partner:56056
BRANCH=none
TEST=Booted kevin-tpm2

Change-Id: I2fc943f89386ccc6cd9293f5811182a5a51d99b0
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: bb1f0fb00d023c045305edc6c9fc655b764a4e8c
Original-Change-Id: Ieb61830b9555da232936087cdcf7c61a1e55bab4
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376883
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16579
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:50:51 +02:00
Julius Werner b6bf1ddb91 gru: Add watchdog reset support
This patch adds support to reboot the whole board after a hardware
watchdog reset, to avoid the usual TPM issues. Work 100% equivalent to
Veyron.

From my tests it looks like both SRAM and PMUSRAM get preserved across
warm reboots. I'm putting the WATCHDOG_TOMBSTONE into PMUSRAM since that
makes it easier to deal with in coreboot (PMUSRAM is currently not
mapped as cached, so we don't need to worry about flushing the results
back before reboot).

BRANCH=None
BUG=chrome-os-partner:56600
TEST='stop daisydog; cat > /dev/watchdog', press CTRL+D, wait 30
seconds. Confirm that system reboots correctly without entering recovery
and we get a HW watchdog event in the eventlog.

Change-Id: I317266df40bbb221910017d1a6bdec6a1660a511
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 3b8f3d064ad56d181191c1e1c98a73196cb8d098
Original-Change-Id: I17c5a801bef200d7592a315a955234bca11cf7a3
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/375562
Original-Commit-Queue: Douglas Anderson <dianders@chromium.org>
Reviewed-on: https://review.coreboot.org/16578
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:50:39 +02:00
Randall Spangler aa1d314ac2 vboot/vbnv_flash: Binary search to find last used entry
This improves the previous linear search to O(log n).  No change in
storage format.

BUG=chromium:640656
BRANCH=none
TEST=Manual
	(test empty)
	flashrom -i RW_NVRAM -e
	Reboot; device should boot normally.

	(start using records)
	crossystem kern_nv=0xaab0
	crossystem recovery_request=1 && reboot
	Device should go into recovery mode with reason 1
	Reboot again; it should boot normally.
	crossystem kern_nv (should still contain 0xaab0)
	Repeat steps several times with request=2, 3, etc.

	flashrom -i RW_NVRAM -r nvdata
	Modify nvdata to copy the first record across all valid
	records
	flashrom -i RW_NVRAM -w nvdata
	Reboot; device should boot normally.

Change-Id: Ieb97563ab92bd1d18a4f6a9e1d20157efe311fb4
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: db9bb2d3927ad57270d7acfd42cf0652102993b1
Original-Change-Id: I1eb5fd9fa6b2ae56833f024bcd3c250147bcc7a1
Original-Signed-off-by: Randall Spangler <rspangler@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/376928
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16577
Tested-by: build bot (Jenkins)
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:50:27 +02:00
Martin Roth 57bfbb0508 checkpatch.pl: ignore '#define asmlinkage'
checkpatch warns that the asmlinkage storage class should be at the
beginning of the declaration when we define it to be an empty value.

Change-Id: I12292d5b42bf6da9130bb969ebe00fca8efcf049
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16358
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:44:11 +02:00
Martin Roth 1ce2ba6832 lint/lint-007-checkpatch: Update lint script
- Check Kconfig files as well.
- Accept a list of directories to check as a command line argument.
- Only look at src & util directories by default.
- Skip src/vendorcode.
- Remove bypass of payloads/coreinfo/util/kconfig directory, it no
longer exists.

Change-Id: Ia522d3ddc29914220bdaae36ea23ded7338c48fd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16359
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:43:11 +02:00
Elyes HAOUAS 374c39e3cf northbridge/via: Add space around operators
Change-Id: I87f8978b8ec6ddc11dd66a77cbb630e057f9831b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16623
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-09-20 21:28:51 +02:00
Elyes HAOUAS 22710a66ac northbridge/intel/e7505/debug.c: Improve code formatting
Change-Id: I63f58d95fa01b1f73f3620a5d13f21ef62e2404c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16588
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 21:28:43 +02:00
Nico Huber ddb2465f8b Makefile: Give .ali files an empty recipe
For Ada sources, .ali files are emitted together with their respective
.o files during compilation. To convince `make` that an .ali was updated
when the .o was rebuilt, it needs an empty recipe.

Change-Id: Ie47122ff3d00460600ed1db97362abf68f59b751
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16639
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 19:21:07 +02:00
Elyes HAOUAS 6350a2e43f src/mainboard/a-trend - emulation: Add space around operators
Change-Id: Ib00a9b2feb723d46642d86b2706728bbca7dd68d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16616
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-09-20 19:06:28 +02:00
Elyes HAOUAS ed5f159ed5 northbridge/intel/i3100: Add space around operators
Change-Id: I5ff894f23dc2a2c59bc5e5d1de4287a6b9c9922c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16625
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 19:06:05 +02:00
Elyes HAOUAS 0a15fe9299 northbridge/intel/i945: Add space around operators
Change-Id: I24505af163544a03e3eab72c24f25fcdc4b1b16c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16624
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:44:51 +02:00
Elyes HAOUAS 1d8daa66ee northbridge/amd/agesa: Improve code formatting
Change-Id: If700dc5fa9ae33649993557f71db0fe1eb76204b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16634
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:42:03 +02:00
Elyes HAOUAS 9309552068 northbridge/intel/e7505: Improve code formatting
Change-Id: I964512c0e913f7443f3dea859b01358645cfd8a6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16632
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:41:19 +02:00
Elyes HAOUAS cf13950736 src/superio: Add space around operators
Change-Id: Ibeab5e7fe0a9005e96934b3b43cfb247ef2e2340
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16615
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-20 17:39:09 +02:00
Elyes HAOUAS a0fed37044 src/include: Add space around operators
Change-Id: I0ee4c443b6861018f05cfc32135d632fd4996029
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16614
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-09-20 17:38:56 +02:00
Elyes HAOUAS c92abedd3a northbridge/intel/i82830: Add space around operators
Change-Id: Ic4e287209cc45fae574e7af9d45b8a0e648ef686
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16627
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:38:36 +02:00
Elyes HAOUAS 69d658f59d northbridge/intel/haswell: Add space around operators
Change-Id: I8fa1e39bfd950475e3b55d6debcbfd92615aa379
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16628
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:38:27 +02:00
Elyes HAOUAS f352e2fab8 northbridge/intel/e7501: Add space around operators
Change-Id: I53aa17076135e55665f2f7c6ede217388fc50cca
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16633
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:38:05 +02:00
Elyes HAOUAS d4fea5c675 northbridge/intel/fsp_rangeley: Add space around operators
Change-Id: Ia60729db83333c1159862cf604de321e3af8dcb1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16631
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:38:01 +02:00
Elyes HAOUAS a3d15afc67 southbridge/via: Add space around operators
Change-Id: Ib48c98bb161b92b28497df26fcfd0eae2c6829df
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16635
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:37:51 +02:00
Elyes HAOUAS 2051448359 northbridge/intel/fsp_sandybridge: Add space around operators
Change-Id: I1b5cdfaf39be639a7ef71e66e91284fa186fbb86
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16630
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:16:30 +02:00
Elyes HAOUAS 9a9c8dba8d northbridge/intel/gm45: Add space around operators
Change-Id: I3781c36a3f354bfd54d20488b95d4f2307c3bce2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16629
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:16:00 +02:00
Elyes HAOUAS c021ffee45 southbridge/amd: Add space around operators
Change-Id: I949ff7de072e5e0753d9c8ff0bf98abfca25798b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16637
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-09-20 17:15:32 +02:00
Duncan Laurie bf7faa1a63 Revert "drivers/i2c/tpm: Move common variables to header"
This reverts commit 64df72e8e2.
2016-09-19 19:21:24 -07:00
Duncan Laurie 9b8ebfb96c Revert "drivers/i2c/tpm: Split cr50 driver from main driver"
This reverts commit c565f99107.
2016-09-19 19:21:02 -07:00
Duncan Laurie 1de4f9549b Revert "drivers/i2c/tpm/cr50: Reduce max buffer size"
This reverts commit 97a2a1ece1.
2016-09-19 19:20:56 -07:00
Duncan Laurie 4d534870c2 Revert "drivers/i2c/tpm/cr50: Clean up timeouts"
This reverts commit 93c778688f.
2016-09-19 19:20:52 -07:00
Duncan Laurie 18f58982b5 Revert "drivers/i2c/tpm/cr50: Rename i2c read/write functions"
This reverts commit 6f5ceb26b9.
2016-09-19 19:20:46 -07:00
Duncan Laurie 7c8e78750b Revert "drivers/i2c/tpm/cr50: Clean up locality functions"
This reverts commit 557e1a729a.
2016-09-19 19:20:39 -07:00
Duncan Laurie 11bfb5e4f0 Revert "drivers/i2c/tpm/cr50: Improve data handling and function names"
This reverts commit 1241e7db55.
2016-09-19 19:20:33 -07:00
Duncan Laurie 1efcfcfff9 Revert "x86: acpi: Add function for querying GPE status"
This reverts commit 884dfe6329.
2016-09-19 19:20:24 -07:00