Commit Graph

24829 Commits

Author SHA1 Message Date
Elyes HAOUAS cbcdb3e754 sb/intel/fsp_rangeley: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: If92825f5bdb1399f61b7eba3ae81caa9c264a554
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:21:07 +00:00
Elyes HAOUAS 4ccb23fe27 sb/intel/fsp_bd82x6x: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I499414c067b06fa94b53832894e804118f7c3e80
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:20:14 +00:00
Elyes HAOUAS b7482219e8 device/device_util.c: Remove space after sizeof
Change-Id: Ic8b77c78739badbea398053944484a55f715d03d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:18:57 +00:00
Elyes HAOUAS a397089259 sb/ti/pci{1x2x,i7420,xx12}: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I37c6db65be4477dabb6064c3cc7ea1c63e467d19
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:18:08 +00:00
Elyes HAOUAS e490a87582 sb/broadcom/bcm5785: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ia39347f9d07bb0055ea4686a8b319f323f68062e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26403
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:17:35 +00:00
Elyes HAOUAS 86c92ba042 sb/broadcom/bcm5780: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ia46b909c78086d9417cabc1cd65e16d264a8df8e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26402
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 07:16:55 +00:00
Matthias Gazzari 04864c7fd0 util/intelmetool: Fix missing comma
Change-Id: I4cb70c2aa466ac71dc8fcd25a7c1824696f32909
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26449
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:15:47 +00:00
Srinidhi N Kaushik 3d38695e5d mb/google/octopus: Re-size flash WP_RO segment
Update the size in WP_RO segment of the flash to accommodate latest FSP builds
with debug.

CQ-DEPEND=CL:*627827

Change-Id: Ic0eb9254421e99c8d204d8dbb86e6c6c2ec8719c
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-on: https://review.coreboot.org/26186
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-22 07:14:55 +00:00
Raul E Rangel a305afb62c stonyridge: Add TP_Perf_STRUCT struct
The TP_Perf_STRUCT was missing from pi/00670F00. So I copied the file
from src/vendorcode/amd/pi/00630F01/Include/IdsPerf.h and removed
everything that we don't need. I did have to change
MAX_PERFORMANCE_UNIT_NUM so it matches the size used by pi/00670F00.

This struct is used to extract the timestamps from AGESA.

BUG=b:64549506
TEST=built on grunt

Change-Id: I06ec82348e3d10f2430c1192a925a49389ae4414
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/26235
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:13:46 +00:00
Marshall Dawson fceac7ed5d amd/stoneyridge: Increase SMM reserved memory
Add 64KB to the reserved memory used for stage_cache.  This corrects
an error observed when using a debug build of the AGESA blob.

Messages on initial boot
  AGESA: Saving stage to cache
  Error: Can't add stage_cache 57a9e101 to imd
and during resume
  AGESA: Loading stage from cache
  Error: Can't find stage_cache 57a9e101 in imd

TEST=boot/suspend/resume Grunt with debug and release builds
BUG=b:79154155

Change-Id: I3f27059fcef37e335d0301142ba4dedb3809e369
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/26386
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:12:57 +00:00
Nico Huber 466841e723 3rdparty/libhwbase: Update submodule pointer
Pull a minor update for GCC 8 compatibility.

Change-Id: I0a4af47d56f3ca0b8ed82533e84c44041661ca35
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26306
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 07:12:43 +00:00
Martin Roth 3dee6d1555 mainboard/google/kahlee: Update RW_LEGACY size in fmap
Add the unused space to the RW_LEGACY area.

BUG=b:79433466
TEST=None

Change-Id: I897d1dcf75466fe9bdb814c8a9db0fecb5c42af6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26221
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 03:29:10 +00:00
Daniel Kurtz e153101b9a google/kahlee: Swap UNIFIED_MRC_CACHE and RW_SECTION_A in fwmap
The firmware_Mosys FAFT test does not allow RW_SECTION_A, RW_SECTION_B or
RW_SHARED to be 0-sized, nor located at offset 0x00000000.

Swap UNIFIED_MRC_CACHE and RW_SECTION_A to pass this test.

BUG=b:79865447
TEST=test_that -b grunt ${IP} firmware_Mosys

Change-Id: If60919fd998ac786d58a5a258d7b5ded727db64b
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-on: https://review.coreboot.org/26356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 03:12:57 +00:00
Martin Roth 3a314658af util/lint: Make the non-ascii character check stable
Change-Id: I967f67a19a96cac8b7e0e98356e87d7d0610d4b2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26435
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-22 03:10:31 +00:00
Martin Roth 9641a92b11 src: Remove non-ascii characters
Change-Id: Iedb78e24a286a51830c85724af0179995ed553be
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-22 02:54:24 +00:00
Julius Werner 8f25a6680e rk3399: Enable bootblock compression
This patch enables the new bootblock compression feature on RK3399,
which requires moving MMU initialization into the decompressor stage and
linking the decompressor (rather than the bootblock) into the entry
point jumped to by the masked ROM.

RK3399's masked ROM seems to be using a bitbang SPI driver to load us
(very long pauses between clocking in each byte), with an effective data
rate of about 1Mbit. Bootblock loading time (as measured on a SPI
analyzer) is reduced by almost 100ms (about a third), while the
decompression time is trivial (under 1ms).

Change-Id: I48967ca5bb51cc4481d69dbacb4ca3c6b96cccea
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26341
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 02:44:33 +00:00
Julius Werner 99f4683adf Introduce bootblock self-decompression
Masked ROMs are the silent killers of boot speed on devices without
memory-mapped SPI flash. They often contain awfully slow SPI drivers
(presumably bit-banged) that take hundreds of milliseconds to load our
bootblock, and every extra kilobyte of bootblock size has a hugely
disproportionate impact on boot speed. The coreboot timestamps can never
show that component, but it impacts our users all the same.

This patch tries to alleviate that issue a bit by allowing us to
compress the bootblock with LZ4, which can cut its size down to nearly
half. Of course, masked ROMs usually don't come with decompression
algorithms built in, so we need to introduce a little decompression stub
that can decompress the rest of the bootblock. This is done by creating
a new "decompressor" stage which runs before the bootblock, but includes
the compressed bootblock code in its data section. It needs to be as
small as possible to get a real benefit from this approach, which means
no device drivers, no console output, no exception handling, etc.
Besides the decompression algorithm itself we only include the timer
driver so that we can measure the boot speed impact of decompression. On
ARM and ARM64 systems, we also need to give SoC code a chance to
initialize the MMU, since running decompression without MMU is
prohibitively slow on these architectures.

This feature is implemented for ARM and ARM64 architectures for now,
although most of it is architecture-independent and it should be
relatively simple to port to other platforms where a masked ROM loads
the bootblock into SRAM. It is also supposed to be a clean starting
point from which later optimizations can hopefully cut down the
decompression stub size (currently ~4K on RK3399) a bit more.

NOTE: Bootblock compression is not for everyone. Possible side effects
include trying to run LZ4 on CPUs that come out of reset extremely
underclocked or enabling this too early in SoC bring-up and getting
frustrated trying to find issues in an undebuggable environment. Ask
your SoC vendor if bootblock compression is right for you.

Change-Id: I0dc1cad9ae7508892e477739e743cd1afb5945e8
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 02:44:14 +00:00
Julius Werner 9123449734 Makefile.inc: Export CCACHE_EXTRAFILES and add __BUILD_DIR__ definition
This patch adds the CCACHE_EXTRAFILES variable to the list of exported
environment variables, which can be useful as a target-specific variable
to make ccache aware of extra dependencies that it cannot figure out on
its own. It also adds a CPPFLAGS parameter to define the __BUILD_DIR__
constant for the preprocessor so that the current output build directory
can be referenced in C code if necessary.

Change-Id: I4fdd08842972cfed8ef5e5a61ebf859c0571bcfb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 02:39:23 +00:00
Julius Werner 12574dd72b bootblock: Allow more timestamps in bootblock_main_with_timestamp()
This patch adds more parameters to bootblock_main_with_timestamp() to
give callers the opportunity to add additional timestamps that were
recorded in the platform-specific initialization phase.

Change-Id: Idf3a0fcf5aee88a33747afc69e055b95bd38750c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26339
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-22 02:39:11 +00:00
Julius Werner 1ca26664e6 Makefile.inc: Add separate bootblock.raw.elf with allocatable BSS
This patch moves the objcopy invocation that changes the bootblock's
section flags to make sure .data and .bss are preserved in the binary
image from the generation of bootblock.raw.bin into a separate
bootblock.raw.elf file. Some SoCs (like SDM845) like to have an ELF
rather than a raw binary as input to their masked ROM wrapper
generation script.

Also move those objcopy flags out into a variable because I'll need them
again in a later patch.

Change-Id: I9557b184df7f753a442c7e0ceb58e81c5e19f2c5
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26338
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 02:38:57 +00:00
Julius Werner 88f4e08acf cbfs-compression-tool: Add raw compression support
This patch adds a new "rawcompress" command to cbfs-compression-tool,
that works exactly the same as "compress" except that it doesn't add the
custom 8-byte header to the file. This can be useful if you need to
compress something into a format that coreboot's decompression routines
can work with, but it's not supposed to go into CBFS.

Change-Id: I18a97a35bb0b0f71f3226f97114936dc81d379eb
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-22 02:38:35 +00:00
Julius Werner 55b3081b89 Revert "program_loading: make types a mask, make unknown type a non-zero"
This reverts commit f3d99b6a65.

Reason for revert: We're now doing this through CBFS types instead, so
this shouldn't be needed anymore.

Change-Id: I9e0d5446365f8ecc045615e4ba1a1313080c9479
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26448
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22 02:38:26 +00:00
Duncan Laurie 045cc899c9 Revert "acpi: device: Walk up the tree to find identifier"
This reverts commit 8ccf59a947.

This wasn't meant to be submitted yet and seems to be causing issues,
just as Patrick warned me..

Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: I8c4b57ba92ef4e0535e4975485188114a1084f09
Reviewed-on: https://review.coreboot.org/26452
Reviewed-by: Daniel Kurtz <djkurtz@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21 23:52:24 +00:00
Elyes HAOUAS e4988ccf06 nb/amd/amdk8: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: If540a8b0afb93c1ba8e901c4771228a43c1e6a14
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:28:10 +00:00
Elyes HAOUAS 1c56f2fe77 sb/sis/sis966: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I6002949fa90a46a2dd0e3519acbf2606bb679322
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:27:20 +00:00
Elyes HAOUAS 1df39c3aca nvidia/mcp55: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I48ab6d77be0201ac7b49b26e0366b6e3a1e5ac52
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:26:34 +00:00
Elyes HAOUAS bcb124e009 sb/via/vt8237r: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ic4137bc4008d08e0e0d002e52c353fc29355ccb1
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26395
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:26:01 +00:00
Elyes HAOUAS ec41dae245 sb/via/k8t890: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I2ff065c863a9d2b480f7432c6280ef59917c8863
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26396
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-21 20:25:38 +00:00
Elyes HAOUAS 674f9c451f sb/amd/cs5536: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I995981fbaaf8c22889920a81faae631b3fd3b2ef
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26415
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:09:31 +00:00
Elyes HAOUAS d9edab5102 sb/amd/amd8151: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Id8a5043015806d8a433a948fc1889ee867ca3aeb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:09:15 +00:00
Elyes HAOUAS d0f3e17bfe sb/amd/amd8132: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ia4be6e9b81fe4627d84c9ed7589a3e6ef2bcede2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26411
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:08:53 +00:00
Elyes HAOUAS f854822fe0 sb/amd/amd8131: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Iac87af2f1a1e331fee70b89548a0d6bbc5839ea0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:08:32 +00:00
Elyes HAOUAS 39733a065d sb/amd/amd8111: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I143617bb1a4ab1812ec50155861ae2f75060851b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:08:19 +00:00
Elyes HAOUAS 8aafbd8252 nb/via/cx700: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Iaca908cc9ba5d11468a97d2f43911db925b93f1e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:01:51 +00:00
Elyes HAOUAS 315b239c35 sb/amd/sb800: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ie48b42cf2999df075e23dc8ba185934b4e600157
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26405
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:01:33 +00:00
Elyes HAOUAS f29a6898ec sb/amd/sb700: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I53acc7dd4ddf2787fc1e59d604cadc4f3b4cb49c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:00:52 +00:00
Elyes HAOUAS 7f55810cf0 sb/amd/sb600: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I587b32e33af72a37be8299b9db2ce26ba825a689
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26407
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 20:00:20 +00:00
Elyes HAOUAS 7a4d41aa2d sb/amd/rs690: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I818f808e1cd8b156158251724352f8be6041030c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26418
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 19:59:51 +00:00
Marshall Dawson d5c4aa7a0a google/kahlee: Reduce UMA memory to 32MB
Lower the amount of UMA memory to 32MB at AMD's request.

TEST=none
BUG=b:79906569

Change-Id: Ib1365dc38850b4b92c944ff95534573addbe4362
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/26383
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21 19:55:21 +00:00
Marshall Dawson 2c8bd0df63 google/grunt: Reduce UMA memory to 32MB
Lower the amount of UMA memory to 32MB at AMD's request.

TEST=boot Grunt, try S3
BUG=b:79906569

Change-Id: I5af038688b38b53c94b8265823eeee0f37980522
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/26382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-21 19:55:12 +00:00
Justin TerAvest 08f4fb07da mb/google/octopus: Add devicetree for Bip
Bip should have different devicetree entries than Yorp; it doesn't have
a DA7219 audio codec (instead it uses ALC5682).

BRANCH=none
BUG=b:79771967
TEST=boot, no longer see DA7219 ACPI in console.

Change-Id: Ic63bbc51e122afc9fc2e8ec7fb024d18a3815b38
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/26342
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2018-05-21 17:40:25 +00:00
Kyösti Mälkki dda0fc4c13 cimx/sb800: Use PCI_DEVFN()
Change-Id: I2d01714e2a72810fe1b6567e7f1b2aab00ac5c80
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26430
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21 14:28:17 +00:00
Kyösti Mälkki 0bc06ab4b1 agesa/hudson pi/hudson: Use PCI_DEVICE_ID
Change to 16bit read of the standard register.

Change-Id: Id085935eb17838c07bd78716158e622f45f56906
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-21 14:25:30 +00:00
Kyösti Mälkki b11d4e3ea4 agesa/hudson pi/hudson: Skip device node search
The device node with requested path is already known.

Change-Id: I2de6a2a6893b1a24085ebcafd5d7604214ed10ef
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26428
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-21 14:23:24 +00:00
Elyes HAOUAS 1cbe19f2d8 sb/nvidia/ck804: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I59078ff96428d134f108ff2551556c8a7d2d3b37
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21 14:02:20 +00:00
Elyes HAOUAS 8349cb58de sb/ricoh/rl5c476: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I04a1fc27f67555132667e42f14fd0263a18b56c6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21 14:01:49 +00:00
Elyes HAOUAS 59b8e4f511 nb/via/vx800: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ib432d3c3ce2788b0138a1b0e852385ab4f9b65ee
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26425
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21 14:01:33 +00:00
Elyes HAOUAS e58a782c11 nb/via/cn700: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ic58bb58b88ffc309472ee9ffc8a9c8619659811b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26423
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-21 14:01:13 +00:00
Julius Werner ee87885343 cbfs-compression-tool: Fix minor edge cases in algorithm type parsing
This patch adds two minor improvements to the way cbfs-compression-tool
parses the compression algorithm type that is passed through the -t
option of the 'compress' subcommand. These improvements are intended
to prevent accidents and unexpected behavior when using the
cbfs-compression-tool, in particular in automated contexts such as a
Makefile rule.

In the first part of this patch, a return statement is inserted after
the 'if (algo->name == NULL)' check of the compress() function. This
causes the function to exit immediately and subsequently abort the
program when the algorithm type was not detected correctly. Previously,
execution would continue with the 'algo' pointer pointing to the zeroed
out stopper entry of the types_cbfs_compression[] array. The ultimate
effect of this would be to pass 0 as 'algo->type' to the
compression_function() function, which happens to be the same
enumeration value as is used for CBFS_COMPRESS_NONE, leading to a valid
compression function result that matches the behavior of no compression.
Thus, if a script calling cbfs-compression-tool compress contained a
typo in the -t parameter, it would continue running with an unintended
compression result rather than immediately exiting cleanly.

In the second part of this patch, the strcmp() function is replaced with
strcasecmp() when comparing 'algo->name' with the 'algoname' parameter
that was passed to the compress() function. strcasecmp() uses an
identical function signature as strcmp() and is thus suitable as a
drop-in replacement, but it differs in behavior: rather than only
returning a result of 0 when the two NULL-terminated input strings are
character by character identical, the strcasecmp() function applies a
weaker concept of identity where characters of the latin alphabet
(hexadecimal ranges 0x41 through 0x5a and 0x61 through 0x7a) are also
considered identical to other characters that differ from them only in
their case. This causes the -t parameter of cbfs-compression-tool
compress to also accept lowercase spellings of the available compression
algorithms, such as "lz4" instead of "LZ4" and "lzma" instead of "LZMA".
As an unintended but harmless side-effect, mixed-case spellings such as
"lZ4" or "LZmA" will also be recognized as valid compression algorithms.
(Note that since the character "4" (hexadecimal 0x34) of the "LZ4"
compression type name is not part of the above-mentioned ranges of latin
alphabet characters, no new substitutions become valid for that part of
the "LZ4" string with this patch.)

Change-Id: I375dbaeefaa0d4b0c5be81bf7668f8f330f1cf61
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/26389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-21 13:25:49 +00:00
Matthias Gazzari dfa51259ad nb/intel/nehalem: Fix smashed stack in romstage
Stack smashing was detected during raminit when not loading from MRC.
Adding CAR_GLOBAL to a struct inside raminit was suggested in
https://mail.coreboot.org/pipermail/coreboot/2018-May/086677.html in
order to fix the problem.
Adding CAR_GLOBAL to the ram timings variable solves the issue (adding
it to the ram_training or raminfo struct had no effect).
This is just a workaround and might need a proper fix in the future.

Tested on Lenovo X201i with 2+2 and 4+4 GB RAM.

Change-Id: I21b380db61be2aedc045201821d83e18e7d07ad1
Signed-off-by: Matthias Gazzari <mail@qtux.eu>
Reviewed-on: https://review.coreboot.org/26388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-21 13:25:24 +00:00