Commit Graph

24749 Commits

Author SHA1 Message Date
Arthur Heymans dc71e25494 nb/intel/nehalem: Use the common mrc cache driver
The common mrc cache driver allows to save the raminit training
results to a separate fmap region which is more manageable than a
cbfsfile.

Change-Id: I25a6d3fe5466d142e3d10429a87b19047040c251
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:21:20 +00:00
Lijian Zhao 0e9bbcc905 intel/fsp: Update Cannonlake FSP header
Update Cannonlake FSP header to version 7.x.2E.50, the following changes
were made,
Memory Init UPD:
	1. Add GDXC configuration options.
	2. Remove some internal graphics memory selections.
	2. Remove Fixed mid option for SaGv.
	3. Add DualDimm per channel board type.
	4. Remove PEG IMR options.
Silicon Init UPD:
	1. Add CD clock selections of 675MHz.
	2. Remove Pcode PreWake/Rampup/RampDn time selections.
	3. Remove C3 state demotion/unDemotion selections.

BUG=None
TEST=Build and boot up on meowth platform.

Change-Id: I08ffb14df9f32089dbf44fa5bd3fc58a5bedb90d
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/26148
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 12:19:56 +00:00
Patrick Rudolph 65cbbe77ac arch/x86/acpigen: Fix corner case in _ROM generator
In case the Option ROM isn't a multiple of 4KiB the last buffer was
truncated to prevent a buffer overrun. But tests on nouveau showed
that nouveau expects a buffer that has the requested size and is zero
padded instead.

Always return a buffer with requested size and zero pad the remaining
bytes. Fixes nouveau on Lenovo W520 with Option ROM not being multiple
of 4 KiB.

Change-Id: I3f0ecc42a21945f66eb67f73e511bd516acf0fa9
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/25999
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Rikken <nico@nicorikken.eu>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
2018-05-18 12:19:43 +00:00
Elyes HAOUAS 892e9f6030 sb/intel/i82801bx: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I661b2435d9f0306b246a3e89aac24eb30c959085
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:18:07 +00:00
Elyes HAOUAS 152f1c918f sb/intel/i82801ax: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I5c18fdc24bd0432f6b7a1131af68c792d377c3ac
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:18:03 +00:00
Elyes HAOUAS 97e8b754bf nb/intel/e7505: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I2176ea83fac30052c02d9f6e98c89c40436a38e8
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:17:54 +00:00
Elyes HAOUAS be841404cc sb/intel/ibexpeak: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I7d9d0a205f9a650eb87bc8f90f2a28a5c4b2891c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26259
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:17:49 +00:00
Elyes HAOUAS 77f7a6e386 nb/intel/haswell: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: I10fb736a7406a6571dffce883fb82c2711526762
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-18 12:17:43 +00:00
Nico Huber 93323b303f cbfstool: Drop `-t` parsing for `add-payload` command
It seems this was never used and the usage doesn't mention it either.

Change-Id: I9240c0ed5453beff6ae46fae3748c68a0da30477
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26324
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 12:16:57 +00:00
Nico Huber ea83e3e9fe Makefile.inc: Drop spurious `-t` from `cbfstool add-payload`
The `-t` argument was never required for `add-payload` and results in
a warning now because the type was renamed.

TEST=Built with BUILD_TIMELESS=1 and compared binaries with and without
     this patch.

Change-Id: I6ccb70acc6e88a602b90c625040d4f05d8e3630a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26323
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 12:16:53 +00:00
Chris Zhou 6e09b3bde9 mb/google/poppy/variants/nami: Fix SoC I2C CLK is abnormal
The I2C CLKs of SoC should be 400kHz, but waveform show 460kHz to
470kHz. Add I2C parameters to adjust I2C CLKs which 5% lower than
400kHz.

BUG=b:78819970
TEST=The I2C CLKs are 5% lower than 400kHz.

Change-Id: I2c3012b5b59c089801cda8fd7b0c433aad9df36d
Signed-off-by: Chris Zhou <chris_zhou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26282
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 12:16:20 +00:00
Nick Vaccaro a613ccd18b mb/google/poppy/variants/nocturne: enable pogo pin USB port
BUG=b:78122599
BRANCH=none
TEST="emerge-nocturne coreboot chromeos-bootimage" and verify pogo
pin port is working.

Change-Id: Ide7359366821f33c4746284e65cacdf4e240931d
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/26315
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-18 12:15:12 +00:00
Hannah Williams 09b883f352 mb/google/octopus: Disable BT before S5 entry
The CNVi wifi/bt module prevents entry into S5 by keeping internal
SoC clocks running. Therefore it's necessary to disable BT prior to
S5 entry.

BUG=b:79606769
TEST= Test if BT device works under following cases:
1. Power-on
2. Press powerbtn before OS entry
3. Power-on from S5 again

Change-Id: Ibc14b4080a27de48d197e16d0eed162603482de2
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/26238
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-18 06:19:32 +00:00
Patrick Rudolph 5c3452b800 nb/intel/nehalem: Add ACPI path
Provide a valid ACPI path for coreboot's SSDT generators.

Fixes all ACPI errors found while booting GNU Linux 4.15 on
Lenovo T410.

Change-Id: Idd4986f39f21cb53cb019d0893d40fed94c6505b
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/26287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-05-17 14:26:53 +00:00
Martin Roth 735b9a0d1c util/abuild: Disable unspecified payload options
We have two payload options in abuild:
"None" or a pointer to an elf file.

This disables all other options in abuild, and makes disabling the other
options common to both valid options.

Change-Id: Icbd6fde4343ac1cff05778131f9e54370baf4224
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-05-17 12:06:33 +00:00
John Su b77cbbe1b0 mb/google/poppy/variants/nami: Update DPTF table
Update dptf.asl from tuning of the thermal team.

BUG=b:72974136
TEST=Match the result from DPTF UI.

Change-Id: I21ddc337359c3e11ad9756e61ba174b33dfc3c75
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2018-05-17 11:42:40 +00:00
Subrata Banik 1c9d8632fa soc/intel/skylake: Fix AP timeout issue while executing sgx_configure
Increase AP timeout limit for sgx_configure function. As per debug log
sgx_configure was not successful on all cores with given timeout value.

TEST=Ensures no timeout error in AP function execution.

Change-Id: Ia83f7a7eb6cd6c4808d55febfebe32724a633173
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26286
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Caveh Jalali <caveh@google.com>
2018-05-17 07:33:57 +00:00
Amanda Huang 13f8998026 mb/google/poppy: Disable one ALS node
Since there are two ALS device nodes on Nami, need to remove one.

BUG=b:79227879
BRANCH=master
TEST=Verify if only one ALS node is found in /sys/bus/iio/devices

Change-Id: I850af06bec833739afa0c8c516d351d81952ce2c
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26271
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-17 07:01:14 +00:00
Patrick Rudolph eeb4e20b2f commonlib/cbfs: Make cbfsf_file_type public
Make cbfsf_file_type public to support detecting the payload type at
runtime. To be used by the following commits.

Possible payload types are:
* simple ELF
* FIT

Change-Id: I37e9fb06f926dc71b001722a6c3b6205a2f20462
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/25859
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-16 21:29:56 +00:00
Patrick Rudolph 71327fbad8 lib/prog_loaders: Store CBFS type in struct prog
Store the type of the loaded program after locating the file and add a
method to retrieve the type.
Will be used to distinguish between SELF and FIT payloads.

Change-Id: Ic226e7e028d722ab9e3c6f7f1c22bde2a1cd8a85
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26028
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-16 20:02:52 +00:00
Lubomir Rintel d8ec973fd2 vx900: Move to EARLY_CBMEM_INIT
To calculate the CBMEM address we need to determine the framebuffer
size early in the ROMSTAGE. We now do the calculation before
cbmem_recovery() and configure the memory controller right away.

If the calculation was done from cbmem_top() instead, we'd loose some
logging that seems useful, since printk() would recurse to cbmem_top() too
with CONSOLE_CBMEM enabled.

If we didn't configure the memory controller at this point, we'd
need to store the result somewhere else. However, CAR_GLOBAL is not
practical at this point, because calling car_get_var() from cbmem_top()
would recurse back to cbmem_top().

Change-Id: Ib9ae0f97f9f769a20a610f8d76f14165fb924042
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/25798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-05-16 06:19:34 +00:00
Ivy Jian faafbfb81e mb/google/poppy/variants/nami: Load pantheon VBT binary
Load pantheon.bin by reading sku-id.

BUG=b:78663963
TEST=Boots to OS and display comes up.
     Check the board specific vbt binary loaded.

Change-Id: I66cb43d87363b3e8b1a1498cdae8eeeb8b75219d
Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26267
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-16 05:13:09 +00:00
Ivy Jian aeb50d20c7 mb/google/poppy/variants/nami: Enable synaptics touchscreen support
BUG=b:74595040
BRANCH=master
TEST=
1. emerge-nami coreboot chromeos-bootimage
2. Booted on Pantheon with S7817 PCBa connected
3. Check touchscreen device is enabled by evtest
/dev/input/event4: SYTS7817:00 06CB:7817

Change-Id: Ic11684d5ed961af5eb704909f7d06eb0898068c2
Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/25915
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-16 05:13:05 +00:00
Ronald G. Minnich c6d134988c Revert "cbfs/payload type: Fix build warning and whitespace in name"
This reverts commit 717ba74836.

This breaks seabios and a few other payloads. This is not
ready for use.

Change-Id: I48ebe2e2628c11e935357b900d01953882cd20dd
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/26310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-16 04:50:55 +00:00
John Su 77a30af41c soc/intel/skylake: check DPTF_TSR1_ACTIVE_AC* in _ACx methods
Because thermal table is not included the values of DPTF_TSR1_ACTIVE_AC
from internal nami/vayne thermal team. Add conditional compilation
in _ACx methods if DPTF_ENABLE_FAN_CONTROL is defined in the dptf.asl.

BUG=b:72974136
TEST=Match the result.

Change-Id: I4b593118ca460a59aa49786cb99df417d135112a
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/26210
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-05-15 15:50:20 +00:00
Naveen Manohar 532b8d5f25 soc/intel/apollolake: add rt5682 NHLT support
Add APIs and required parameters for creating Realtek 5682 SSP
endpoint in NHLT table.

BUG=b:79235534
TEST=check that NHLT table defined is created properly.
With the series merged & required driver support in kernel.
Verify Headset Audio playback.

Change-Id: Ic26a0b881f77af64ba00fd714b08c0f17c0acb3d
Signed-off-by: Naveen Manohar <naveen.m@intel.com>
Reviewed-on: https://review.coreboot.org/26057
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 15:49:29 +00:00
Patrick Rudolph ebdeb4d07d Documentation/Intel/NativeRaminit: Style fixes
Fix tables and minor markdown bugs.

Change-Id: I2ceb9614b516cbea19ab5e15ea7efabdfa3424bd
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/26276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-15 15:48:18 +00:00
Martin Roth 5dbe8ee725 ACPI: Set the correct number of arguments in ACPI methods
These methods had unused arguments and could be corrected by
setting the correct number in the method initializer.

Change-Id: I86606cfa1c391e2221cee31994e83667fa9ead61
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-05-15 15:43:41 +00:00
Martin Roth 782c910e86 mainboard/amd/*: Remove unused arguments from SIOW ACPI method
Since the SIOW method doesn't use any arguments, don't pass it any,
and initialize it as not using any.

Change-Id: I3fa2ab8afb7d09c176a94bbd1db27587c36030cd
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/26126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 15:42:13 +00:00
Martin Kepplinger e397f55702 3rdparty/blobs: Update submodule marker for Intel microcode updates
This adds the following changes to the blobs repository:

78a02a7 cpu/intel: microcode: add license agreement
1d37962 cpu/intel: add microcode updates 20180312 for new CPU models
8b8bbce cpu/intel: apply microcode updates 20180312 to currently tracked models

In short: Bump Intel microcode updates. They include spectre/meltdown
mitigations.

Change-Id: I141f4446bc4e3bff5641bc39b70b299dc09ac8a7
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Reviewed-on: https://review.coreboot.org/26270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 13:19:19 +00:00
Patrick Rudolph 5afc2936b8 libpayload-x86: Add PS2 mouse driver
Make use of i8042 driver to add PS2 mouse driver support.

Tested on Lenovot T500.
The touchpad can be used to drive the mouse cursor.

Change-Id: I4be9c74467596b94d64dfa510824d8722108fe9c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-05-15 12:02:31 +00:00
Samuel Holland c622dc5e82 superio/ite/it8720f: Implement power control
Program the Super I/O to turn the machine on or restore its power state
when AC power is restored.

Based on code from src/superio/nuvoton/nct5572d/superio.c.

Change-Id: I1f3432f43b0784c3696bf1d7233b83d3a203af20
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-on: https://review.coreboot.org/25463
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-15 11:47:14 +00:00
Julien Viard de Galbert 9d217bf79a mb/scaleway/tagada: Set DIMM slot information from mainboard
This field is not provided by the soc code so add it.

TEST=Check the output of 'dmidecode -t memory'

Change-Id: I6fdf3520da62336a5c654575ed8d1f33eb4f4dc5
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/24912
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-15 11:44:34 +00:00
Patrick Rudolph 52165966f3 libpayload-x86: keyboard: Use i8042 driver
Make use of i8042 driver in keyboard.c.

Required to add PS/2 mouse support.

Tested on Lenovo T500.

Change-Id: If60b5ed922b8fc4b552d0bfd9fe20c0fd6c776bf
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18596
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:21:55 +00:00
Paul Menzel 717ba74836 cbfs/payload type: Fix build warning and whitespace in name
Currently, adding a payload to CBFS using the build system, the warning
below is shown.

    W: Unknown type 'payload' ignored

Update payload type from "simple elf" to "simple_elf" and rename the
word "payload" to "simple_elf" in all Makefiles.

Fixes: 4f5bed52 (cbfs: Rename CBFS_TYPE_PAYLOAD to CBFS_TYPE_SELF)
Change-Id: Iccf6cc889b7ddd0c6ae04bda194fe5f9c00e495d
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/26240
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:20:45 +00:00
Patrick Rudolph 9d22172558 libpayload-x86: Move keyboard.c
Move keyboard.c into i8042 folder.

Change-Id: Idd30a9082e48a451d9fe5ead3f3dda4e6396b50c
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18595
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:20:30 +00:00
Patrick Rudolph e6a3821b97 libpayload-x86: Add common i8042 driver
Add a common i8042 driver that uses multiple overflowing
fifos to seperate PS/2 port and PS/2 aux port.

Required to support PC keyboard and PC mouse at the same time.

Tested on Lenovo T500.

Change-Id: I4ca803bfa3ed45111776eef1f4dccd3fab02ea39
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18594
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:20:06 +00:00
Paul Menzel 2b2f89565e mb/emulation/qemu-q35: Enable user option table support
It’s unclear why this option was commented out. Activate the line, and
copy the CMOS layout and defaults from qemu-i440fx.

TEST=Boot 2.11.1(Debian 1:2.11+dfsg-1ubuntu7) and see that nvramcui
     works. A changed value doesn’t survive a reboot though.

Change-Id: Ieef86f092d323c68a6d2d0cc6c04c395f743a935
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/26265
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:16:08 +00:00
David Wu bb0d839b68 mb/google/fizz: Add device index for dual LAN sku
Fix dual LAN sku can't inherit correct MAC from VPD setting.

BUG=b:77836343
BRANCH=Fizz
TEST=Program the mac address to VPD in shell
     vpd -s ethernet_mac0=<mac address1>
     vpd -s ethernet_mac1=<mac address2> && reboot the system.
     Ensure the MAC address was fetched correctly by ifconfig command.

Change-Id: Ic357a3f1435d6d08107520e40872f1003ef2edf3
Signed-off-by: David Wu <david_wu@quantatw.com>
Reviewed-on: https://review.coreboot.org/25587
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:15:05 +00:00
David Wu 9a0d9e072f drivers/net: Check "ethernet_mac" when the device index is 1
It is a special case for the Fizz firmware branch, when the device index
is 1, it will check "ethernet_mac" first and then "ethernet_mac0".

For single NIC: config.device_index = "1", maps to "ethernet_mac"
For multiple NICs: config.device_index = "1", maps to "ethernet_mac0"

BUG=b:77836343
BRANCH=Fizz
TEST=Add device index in device tree &&
     Program the mac address to VPD in shell
     vpd -s ethernet_mac=<mac address> or
     vpd -s ethernet-mac[0-9]=<mac address> && reboot the system.
     Ensure the MAC address was fetched correctly by ifconfig command.

Change-Id: I67fd2e999c8f9d8782f294fcafa84b8da970a3a6
Signed-off-by: David Wu <david_wu@quantatw.com>
Reviewed-on: https://review.coreboot.org/26051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-15 11:14:54 +00:00
Lubomir Rintel 6cc4dea9f1 msrtool: add VIA C7
Change-Id: I67c4f579f898a709dde3fab6bab1474a721da770
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18258
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 11:14:10 +00:00
Kyösti Mälkki 1edd66c1ef util/msrtool: Check for VENDOR_AMD for K8 probe
Change-Id: Icc3973dfc7217ca649fb4151ccdea5461a550bb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 03:57:13 +00:00
Kyösti Mälkki 15a971b89f util/msrtool: Fix swapped IA32_MC3_x and IA32_MC4_x
Registers IA32_MCi_xx are defined as architectural MSRs
since "P6 Family Processors" and should have model-agnostic
indexing.

Note that in IA32 architecture manual, names of these MSRs are
similarly swapped in the table of Intel Core Microarchitecture.
I take this is an error in the documentation only, and it got
copy-pasted across different CPU family files in the utility.

Change-Id: I227102875b5c3d6ac144ed23a3085f3c37dabd4a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26269
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 03:56:51 +00:00
Kyösti Mälkki 8b72aaf3f7 util/msrtool: Fix names from IA32_MCO_xx to IA32_MC0_xx
Change-Id: I46cd986f4914b214156da49db37ecfa749386ce8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-15 03:56:20 +00:00
Lubomir Rintel fbf57596bb msrtool: use a bit more clever cpuid vendor match
Not everything non-intel is AMD.

Change-Id: I06d6fbaa0b4f2c9e61d9b3b4aeeb349a91aa090e
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-on: https://review.coreboot.org/18255
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-15 03:55:19 +00:00
Elyes HAOUAS 07e77f13d4 sb/intel/i82371eb: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Ie366a49045940747eb5cc1e38316cce31c5774cb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-14 22:26:46 +00:00
Elyes HAOUAS 6f7e8dee58 nb/intel/fsp_sandybridge: Get rid of device_t
Use of device_t has been abandoned in ramstage.

Change-Id: Id3289c891e8a81c750fc3f5fad0fd16c0f2702fe
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2018-05-14 22:26:24 +00:00
Elyes HAOUAS 9749a85cb0 nb/intel/i945/raminit.c: Remove not necessary braces {}
Braces {} are not necessary for single statement blocks.

Change-Id: I2a2d8672fe3f53450dcfa53dc127b89b4aa6b75e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-05-14 22:25:02 +00:00
Ronald G. Minnich 60fd684698 cbfs_locate: Optionally return file type
In some cases callers want to know if a file
exists and, if so, what its type is.

Modify cbfs_locate so that if the pointer is non-NULL,
but has the value 0, the type of the file that
matches the name will be returned.

Change-Id: Ic1349d358c3054207ccbccf3825db56784327ad0
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/26279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-14 21:54:15 +00:00
Julien Viard de Galbert 5a1f5400fb soc/intel/denverton_ns: Enable common code for CPU
Change-Id: Ib215aa17dd20112946b74a1b63ce8a735388873c
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/24927
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-14 21:03:43 +00:00