coreboot-kgpe-d16/src/arch
Jonathan Neuschäfer 018a9af4d5 arch/riscv: Don't hardcode CSR numbers anymore
They are hopefully stable enough by now.

TEST=Building with for emulation/spike-riscv with BUILD_TIMELESS,
     with and without this patch, results in the same coreboot.rom.

Change-Id: Ie6747c7eeea6cd8fd2138c5ba535a08c5add9038
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philipp Hug <philipp@hug.cx>
2018-12-18 13:25:45 +00:00
..
arm src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
arm64 src: Remove unneeded include <cbmem.h> 2018-11-16 10:56:47 +00:00
mips selfboot: remove bounce buffers 2018-10-11 17:42:41 +00:00
ppc64 arch/power8: Rename to ppc64 2018-11-30 20:02:17 +00:00
riscv arch/riscv: Don't hardcode CSR numbers anymore 2018-12-18 13:25:45 +00:00
x86 cpuid: Add helper function for cpuid(1) functions 2018-12-13 04:32:57 +00:00