coreboot-kgpe-d16/src/soc/intel/cannonlake/acpi
Aamir Bohra 8a77454e33 soc/intel/cannonlake: Remove unused header files from southbridge.asl
Change-Id: I1f970db22f87e8eba0129ca049f75d16539644a5
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2019-07-13 13:59:36 +00:00
..
dptf.asl soc/intel/cannonlake: Replace device name B0D4 with TCPU 2019-01-23 16:42:45 +00:00
globalnvs.asl soc/intel/cannonlake: Fix DSDT compile remarks 2019-03-04 14:00:34 +00:00
gpio.asl soc/intel/cannonlake: Add GPID and CGPM methods to GPIO ASL 2019-07-11 15:02:43 +00:00
gpio_cnp_h.asl soc/intel/cannonlake: Add cannonlake ACPI GPIO op 2019-01-03 19:50:00 +00:00
gpio_op.asl soc/intel/cannonlake: Add ASL functions to manipulate RX/TX buffers 2019-02-27 11:04:40 +00:00
ipu.asl soc/intel/cannonlake: Add all the SOC level DSDT tables 2017-10-05 21:16:46 +00:00
ish.asl soc/intel/cnl/acpi: add ish ACPI device 2019-03-04 14:01:38 +00:00
lpc.asl soc/intel/cannonlake: Add all the SOC level DSDT tables 2017-10-05 21:16:46 +00:00
lpit.asl soc/intel/cannonlake: Make EC S0ix notification optional in LPIT 2019-07-11 15:01:24 +00:00
northbridge.asl soc/intel/cannonlake: Fix DSDT compile remarks 2019-03-04 14:00:34 +00:00
pch_glan.asl soc/intel/cannonlake: Add ACPI entry for LAN 2018-09-28 09:53:59 +00:00
pch_hda.asl soc/intel/cannonlake: Add all the SOC level DSDT tables 2017-10-05 21:16:46 +00:00
pci_irqs.asl soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices 2018-11-15 11:18:07 +00:00
pcie.asl soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices 2018-11-15 11:18:07 +00:00
platform.asl soc/intel/cannonlake: Add platform.asl 2017-10-20 20:52:46 +00:00
scs.asl soc/intel/cannonlake: Add _DSM method for SD controller 2019-06-07 18:54:44 +00:00
serialio.asl soc/intel/cannonlake: Add all the SOC level DSDT tables 2017-10-05 21:16:46 +00:00
sleepstates.asl soc/intel/cannonlake: Enable S4 sleep state support 2018-10-25 09:21:24 +00:00
smbus.asl soc/intel/cannonlake: Add all the SOC level DSDT tables 2017-10-05 21:16:46 +00:00
southbridge.asl soc/intel/cannonlake: Remove unused header files from southbridge.asl 2019-07-13 13:59:36 +00:00
xhci.asl soc/intel/cannonlake: Fix and clean up xhci ACPI code 2017-11-15 05:56:33 +00:00