Michał Żygowski 1119428693 soc/intel/braswell/smbus: Enable early SMBus in romstage ... Enable early SMBus support compatible with SPD library using Intel SB common SMBus API. TEST=boot Protectli FW2B with new FSP, MemoryInit should pass without errors Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/32062 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de>		2019-05-10 15:13:07 +00:00
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apollolake	soc/intel/apollolake: Reset GPI IS & IE registers at ramstage	2019-05-06 10:34:52 +00:00
baytrail	vboot: refactor OPROM code	2019-04-30 21:47:25 +00:00
braswell	soc/intel/braswell/smbus: Enable early SMBus in romstage	2019-05-10 15:13:07 +00:00
broadwell	Fix code that would trip -Wtype-limits	2019-05-06 10:32:15 +00:00
cannonlake	soc/intel/cannonlake: Fix pcie clock number	2019-05-09 18:05:00 +00:00
common	Change the guard for bootblock_systemagent_early_init to ENV_BOOTBLOCK	2019-05-09 14:59:39 +00:00
denverton_ns	soc/intel: Add GPI interrupt config register offset info	2019-04-29 12:18:27 +00:00
fsp_baytrail	src: Use include <console/console.h> when appropriate	2019-04-23 10:01:21 +00:00
fsp_broadwell_de	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
icelake	soc/intel/icelake: Correct the GPE DWx mapping for GPIO groups	2019-05-02 06:03:21 +00:00
quark	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
skylake	soc/intel/skylake: remove PrimaryDisplay check	2019-05-07 16:03:01 +00:00
Kconfig	src/cpu: Remove dead sourced lines	2018-11-15 10:25:20 +00:00