coreboot-kgpe-d16/src/cpu/intel
Alexandru Gagniuc 00b579a447 buildsystem: Make CPU microcode updating more configurable
This patch aims to improve the microcode in CBFS handling that was
brought by the last patches from Stefan and the Chromium team.

Choices in Kconfig
  - 1) Generate microcode from tree (default)
  - 2) Include external microcode file
  - 3) Do not put microcode in CBFS

The idea is to give the user full control over including non-free
blobs in the final ROM image.

MICROCODE_INCLUDE_PATH Kconfig variable is eliminated. Microcode
is handled by a special class, cpu_microcode, as such:

cpu_microcode-y += microcode_file.c

MICROCODE_IN_CBFS should, in the future, be eliminated. Right now it is
needed by intel microcode updating. Once all intel cpus are converted to
cbfs updating, this variable can go away.

These files are then compiled and assembled into a binary CBFS file.
The advantage of doing it this way versus the current method is that
  1) The rule is CPU-agnostic
  2) Gives user more control over if and how to include microcode blobs
  3) The rules for building the microcode binary are kept in
   src/cpu/Makefile.inc, and thus would not clobber the other makefiles,
   which are already overloaded and very difficult to navigate.

Change-Id: I38d0c9851691aa112e93031860e94895857ebb76
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/1245
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-09-05 03:40:47 +02:00
..
car Intel CPUs: Fix counting of CPU cores 2012-08-03 12:19:31 +02:00
ep80579 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
hyperthreading Intel CPUs: Fix counting of CPU cores 2012-08-03 12:19:31 +02:00
microcode buildsystem: Make CPU microcode updating more configurable 2012-09-05 03:40:47 +02:00
model_6bx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_6dx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_6ex Synchronize rdtsc instructions 2012-08-09 00:38:39 +02:00
model_6fx Synchronize rdtsc instructions 2012-08-09 00:38:39 +02:00
model_6xx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_65x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_67x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_68x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_69x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_106cx Intel model_106cx: change CAR to HT-capable 2012-08-27 15:39:29 +02:00
model_206ax buildsystem: Make CPU microcode updating more configurable 2012-09-05 03:40:47 +02:00
model_1067x Synchronize rdtsc instructions 2012-08-09 00:38:39 +02:00
model_f0x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f1x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f2x Revert "Use broadcast SIPI to startup siblings" 2012-07-31 06:46:02 +02:00
model_f3x Revert "Use broadcast SIPI to startup siblings" 2012-07-31 06:46:02 +02:00
model_f4x Revert "Use broadcast SIPI to startup siblings" 2012-07-31 06:46:02 +02:00
slot_1 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
slot_2 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_441 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_BGA956 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_FC_PGA370 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_LGA771 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mFCBGA479 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mFCPGA478 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mPGA478 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mPGA479M Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mPGA603 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_mPGA604 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_PGA370 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
socket_rPGA989 Auto-declare chip_operations 2012-08-22 05:06:41 +02:00
speedstep Rework ACPI CST table generation 2012-04-30 23:05:40 +02:00
thermal_monitoring drop unused code (trivial) 2008-08-01 11:53:39 +00:00
turbo Add support for Intel Turbo Boost feature 2012-04-03 20:29:33 +02:00
Kconfig Add support for Intel Sandybridge CPU 2012-04-05 21:10:25 +02:00
Makefile.inc Add support for Intel Sandybridge CPU 2012-04-05 21:10:25 +02:00