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coreboot-kgpe-d16/src/northbridge/intel/ironlake
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Angel Pons 302a1437cd nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntax 
This brings Ironlake closer to Sandy Bridge.

Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.

Change-Id: Idde75e7295f642f8add34168bffe5851ea02fbc6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43687
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-08-04 21:31:08 +00:00
..
acpi nb/intel/ironlake/acpi/hostbridge.asl: Use ASL 2.0 syntax 2020-08-04 21:31:08 +00:00
acpi.c nb/intel/ironlake: Correct PCIEXBAR definition 2020-08-03 05:30:59 +00:00
bootblock.c nb/intel/ironlake: Correct PCIEXBAR definition 2020-08-03 05:30:59 +00:00
chip.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
early_init.c nb/intel/ironlake: Add Generic Non-Core register definitions 2020-08-03 05:32:20 +00:00
finalize.c nb/intel/ironlake: Drop copy-pasted and unused macro 2020-07-01 18:15:58 +00:00
gma.c nb/intel/ironlake: Clean up code style (except raminit) 2020-07-02 19:29:10 +00:00
hostbridge_regs.h nb/intel/ironlake: Correct PCIEXBAR definition 2020-08-03 05:30:59 +00:00
ironlake.h nb/intel/ironlake: Add Generic Non-Core register definitions 2020-08-03 05:32:20 +00:00
Kconfig treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Makefile.inc src: Remove leading blank lines from SPDX header 2020-05-18 07:00:27 +00:00
memmap.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
northbridge.c nb/intel/ironlake: Drop D0F0_ prefix from register names 2020-08-03 05:28:57 +00:00
raminit.c nb/intel/ironlake: Add Generic Non-Core register definitions 2020-08-03 05:32:20 +00:00
raminit.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
raminit_tables.c treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
raminit_tables.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
romstage.c nb/intel/ironlake: Clean up code style (except raminit) 2020-07-02 19:29:10 +00:00
smi.c nb/intel/ironlake: Add definition for SAD PCI device 2020-08-03 05:30:50 +00:00