coreboot-kgpe-d16/src/soc/intel/quark
Shelley Chen 4e9bb3308e Rename ECAM-specific MMCONF Kconfigs
Currently, the MMCONF Kconfigs only support the Enhanced Configuration
Access mechanism (ECAM) method for accessing the PCI config address
space.  Some platforms have a different way of mapping the PCI config
space to memory.  This patch renames the following configs to
make it clear that these configs are ECAM-specific:

- NO_MMCONF_SUPPORT --> NO_ECAM_MMCONF_SUPPORT
- MMCONF_SUPPORT --> ECAM_MMCONF_SUPPORT
- MMCONF_BASE_ADDRESS --> ECAM_MMCONF_BASE_ADDRESS
- MMCONF_BUS_NUMBER --> ECAM_MMCONF_BUS_NUMBER
- MMCONF_LENGTH --> ECAM_MMCONF_LENGTH

Please refer to CB:57861 "Proposed coreboot Changes" for more
details.

BUG=b:181098581
BRANCH=None
TEST=./util/abuild/abuild -p none -t GOOGLE_KOHAKU -x -a -c max
     Make sure Jenkins verifies that builds on other boards

Change-Id: I1e196a1ed52d131a71f00cba1d93a23e54aca3e2
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57333
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-10 17:24:16 +00:00
..
bootblock
include/soc src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
romstage
acpi.c ACPI: Have common acpi_fill_mcfg() 2021-10-18 14:20:28 +00:00
chip.c
chip.h src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
ehci.c
fsp_params.c
gpio_i2c.c
i2c.c
Kconfig Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
lpc.c
Makefile.inc cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs 2021-10-25 20:18:40 +00:00
memmap.c
northcluster.c
reg_access.c src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
reset.c
sd.c
spi.c
spi_debug.c src/soc to src/superio: Fix spelling errors 2021-10-05 18:07:08 +00:00
storage_test.c
tsc_freq.c
uart.c
uart_common.c