Matt Delco 54e9894353 soc/intel: fix eist enabling ... There was a bug like this for skylake that seems to have been copied to other SoCs. Signed-off-by: Matt Delco <delco@chromium.org> Change-Id: Ib4651eda46a064dfb59797ac8e1cb8c38bb8e38c Reviewed-on: https://review.coreboot.org/c/coreboot/+/39411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2020-03-10 20:29:10 +00:00
..
acpi	soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpi	2020-01-09 08:25:12 +00:00
bootblock	soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774	2020-02-17 15:30:58 +00:00
include/soc	intel/soc: skl,apl,cnl,icl,tgl: add INTRUDER relevant registers	2020-03-07 20:32:46 +00:00
romstage	soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig	2020-03-01 07:21:41 +00:00
acpi.c	soc/intel/{apl,cnl,icl,skl,tgl}: Make above 4GB MMIO resource proper	2020-01-10 08:40:57 +00:00
chip.c
chip.h	src: capitalize 'PCIe'	2020-03-04 15:43:30 +00:00
cpu.c	soc/intel: fix eist enabling	2020-03-10 20:29:10 +00:00
elog.c
espi.c
finalize.c	src/soc/intel: Remove unused <stdlib.h>	2019-12-19 05:41:08 +00:00
fsp_params.c	soc/intel/{cnl,icl}: Avoid static 8254 clock gating on S3 resume	2020-02-26 02:21:46 +00:00
gpio.c
graphics.c
gspi.c
i2c.c
Kconfig	soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by Kconfig	2020-03-01 07:21:41 +00:00
lockdown.c	soc/intel/icelake: lockdown: lock global reset	2019-11-20 13:35:22 +00:00
Makefile.inc	soc/intel: skl,cnl,icl: consolidate ebda and memmap	2019-11-04 19:24:49 +00:00
p2sb.c
pmc.c
pmutil.c	soc/intel: Add get_pmbase	2020-02-04 18:54:01 +00:00
reset.c	soc/intel/{cnl,icl,skl,tgl,common}: Make changes to send_heci_reset_req_message()	2020-02-09 19:20:44 +00:00
sd.c
smihandler.c	soc/intel/common/block: Move cse common functions into block/cse	2020-02-25 10:13:08 +00:00
smmrelocate.c	src: Use '#include <smp/node.h>' when appropriate	2019-12-19 05:23:25 +00:00
spi.c
systemagent.c
uart.c