coreboot-kgpe-d16/src/soc/intel/alderlake
Tim Wawrzynczak 461ff1d3e6 soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h
This enum is useful to have around for more than just the one file, so
move it to a common header file, and while we're there, also add an
option for UNKNOWN.

TEST=boot test on brya0

Change-Id: I9ccf0ed9504dbf6c60e521a45ea4b916d3dcbeda
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
2021-12-06 12:31:09 +00:00
..
acpi Revert "soc/intel/adl: Drop SGPM, RGPM and EGPM methods" 2021-11-17 15:54:10 +00:00
bootblock soc/intel/common: Include Alder Lake-N device IDs 2021-11-29 09:46:40 +00:00
include/soc soc/intel/alderlake: Add support for ADL-N PCH 2021-12-03 21:29:37 +00:00
romstage soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.h 2021-12-06 12:31:09 +00:00
acpi.c soc/intel: Constify soc_get_cstate_map() 2021-10-19 14:57:59 +00:00
chip.c soc/intel/alderlake: Add igd device 2021-09-16 00:05:21 +00:00
chip.h soc/intel/alderlake: Add the CnviDdrRfim configuration 2021-12-03 15:48:27 +00:00
chipset.cb soc/intel/alderlake: Add ADLP 4+4+2 power configurations 2021-11-25 19:43:00 +00:00
cpu.c cpu/x86/mp_init: move printing of failure message into mp_init_with_smm 2021-10-22 01:27:07 +00:00
crashlog.c soc/intel/alderlake: remove tmp bar assignment for cpu crashlog 2021-11-23 09:21:16 +00:00
dptf.c drivers/intel/dptf: Add support for PCH methods 2021-10-11 12:45:47 +00:00
elog.c
espi.c
finalize.c soc/intel/{adl,ehl,jsl,tgl}: Remove unused header thermal.h 2021-11-22 08:02:48 +00:00
fsp_params.c soc/intel/alderlake: Add TDP to give correct VR configuration 2021-12-03 15:37:44 +00:00
gpio.c soc/intel/alderlake: set lock offset for gpio pad communities 2021-10-26 19:33:37 +00:00
gspi.c
i2c.c soc/intel/alderlake: Add support for I2C6 and I2C7 2021-07-20 13:35:10 +00:00
Kconfig soc/intel/alderlake: Add support for ADL-N PCH 2021-12-03 21:29:37 +00:00
lockdown.c
Makefile.inc soc/intel/alderlake: Fix build failure with enabled CSE stitching 2021-11-15 23:02:55 +00:00
me.c
meminit.c soc/intel/alderlake: Implement WA for DDR5 DIMM modules 2021-07-13 14:30:07 +00:00
p2sb.c
pcie_rp.c
pmc.c soc/intel: implement ACPI timer disabling per SoC and drop common code 2021-10-17 13:57:53 +00:00
pmutil.c
reset.c
smihandler.c
soundwire.c soc/intel/common: Move PMC EPOC related code to Intel common code 2021-06-30 07:34:44 +00:00
spi.c soc/intel: Update api name for getting spi destination id 2021-10-26 18:12:17 +00:00
systemagent.c Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
uart.c
vr_config.c soc/intel/alderlake: Add TDP to give correct VR configuration 2021-12-03 15:37:44 +00:00
xhci.c