coreboot-kgpe-d16/src/southbridge/intel
Nico Huber 7b2f9f6994 intel/southbridge/bd82x6x: Add option to set SPI VSCC registers
These are needed for the hardware-sequencing function of the PCH SPI
interface. Values are specific to the flash chip used on a board.

Change-Id: Id06766b4bac2686406bc09b8afa02f311f40dee7
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/11798
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Duncan Laurie <dlaurie@google.com>
2015-10-16 22:47:22 +00:00
..
bd82x6x intel/southbridge/bd82x6x: Add option to set SPI VSCC registers 2015-10-16 22:47:22 +00:00
common intel: auto include intel/common/firmware 2015-09-29 13:55:52 +00:00
esb6300 devicetree: Discriminate device ops scan_bus() 2015-06-04 11:19:01 +02:00
fsp_rangeley Revert "Remove FSP Rangeley SOC and mohonpeak board support" 2015-10-14 22:49:03 +00:00
i3100 Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
i82371eb device_ops: add device_t argument to acpi_fill_ssdt_generator 2015-06-05 21:11:43 +02:00
i82801ax Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
i82801bx Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
i82801cx devicetree: Discriminate device ops scan_bus() 2015-06-04 11:19:01 +02:00
i82801dx x86 SMM: Relocator is intel-only 2015-06-08 23:20:26 +02:00
i82801ex devicetree: Discriminate device ops scan_bus() 2015-06-04 11:19:01 +02:00
i82801gx timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2015-07-07 20:07:49 +02:00
i82801ix Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() 2015-07-12 18:14:23 +02:00
i82870 kbuild: automatically include southbridges 2015-04-27 23:48:35 +02:00
ibexpeak intel: auto include intel/common/firmware 2015-09-29 13:55:52 +00:00
lynxpoint Add EM100 'hyper term' spi console support in ramstage & smm 2015-10-05 17:43:11 +00:00
sch azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00