Felix Held 4b2464fc90 arch/x86: factor out and commonize HPET_BASE_ADDRESS definition ... All x86 chipsets and SoCs have the HPET MMIO base address at 0xfed00000, so define this once in arch/x86 and include this wherever needed. The old AMD AGESA code in vendorcode that has its own definition is left unchanged, but sb/amd/cimx/sb800/cfg.c is changed to use the new common definition. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ifc624051cc6c0f125fa154e826cfbeaf41b4de83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62304 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>		2022-02-25 17:42:45 +00:00
..
acpi	soc/intel/elkhartlake: Add PSE TSN support	2022-01-25 16:09:56 +00:00
bootblock	soc/intel/ehl: Add Kconfig option to disable reset on TCO expiration	2022-01-25 16:15:30 +00:00
include/soc	arch/x86: factor out and commonize HPET_BASE_ADDRESS definition	2022-02-25 17:42:45 +00:00
romstage	soc/intel/elkhartlake: Introduce Intel PSE	2022-01-25 16:09:18 +00:00
acpi.c	soc/intel: Remove unused <string.h>	2022-01-05 17:37:49 +00:00
chip.c	soc/intel/elkhartlake: Add PSE TSN support	2022-01-25 16:09:56 +00:00
chip.h	soc/intel/elkhartlake: Add PSE TSN support	2022-01-25 16:09:56 +00:00
cpu.c	cpu/x86/lapic: Move LAPIC configuration to MP init	2022-02-05 07:59:04 +00:00
espi.c	src: Match array format in function declarations and definitions	2021-05-13 18:34:38 +00:00
finalize.c	soc/intel/{adl,ehl,jsl,tgl}: Remove unused header thermal.h	2021-11-22 08:02:48 +00:00
fsp_params.c	soc/intel/elkhartlake: Add PSE TSN support	2022-01-25 16:09:56 +00:00
gpio.c	soc/intel/{xeon-sp,icl,tgl,jsl,ehl}: add NMI_{EN,STS} registers	2021-09-23 06:31:48 +00:00
gspi.c	soc/intel/elkhartlake: Do initial SoC commit till ramstage	2020-09-08 05:29:37 +00:00
i2c.c	soc/intel/elkhartlake: Update SerialIO devices details	2020-12-14 05:46:21 +00:00
Kconfig	drivers/fsp/fsp2_0: Rework FSP Notify Phase API configs	2022-02-18 20:21:45 +00:00
lockdown.c	soc/intel/elkhartlake: Do initial SoC commit till ramstage	2020-09-08 05:29:37 +00:00
Makefile.inc	soc/intel/elkhartlake: Introduce Intel PSE	2022-01-25 16:09:18 +00:00
me.c	soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_mode	2022-01-02 12:29:07 +00:00
meminit.c	spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()	2021-03-17 08:10:35 +00:00
p2sb.c	soc/intel/elkhartlake: Do initial SoC commit till ramstage	2020-09-08 05:29:37 +00:00
pmc.c	soc/intel/*/pmc: Add finalize operation for pmc	2022-02-15 17:20:43 +00:00
pmutil.c	soc/intel/elkhartlake: Clear RTC_BATTERY_DEAD	2021-09-20 15:44:16 +00:00
reset.c	soc/intel: Use of common reset code block	2020-11-02 10:43:53 +00:00
sd.c	soc/intel/elkhartlake: Do initial SoC commit till ramstage	2020-09-08 05:29:37 +00:00
smihandler.c	soc/intel/common/cse: Rework heci_disable function	2022-02-02 07:09:28 +00:00
spi.c	soc/intel/elkhartlake: Do initial SoC commit till ramstage	2020-09-08 05:29:37 +00:00
systemagent.c	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
uart.c	soc/intel/*: drop UART pad configuration from common code	2021-03-12 08:48:03 +00:00