coreboot-kgpe-d16/src/arch/riscv
Kyösti Mälkki 6fdb223859 arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0
These platforms return to romstage from FSP only after
already having torn CAR down. A copy of the entire CAR
region is available and discoverable via HOB.

Previously, CBMEM console detected on-the-fly that CAR
migration had happened and relocated cbmem_console_p
accoringlin with car_sync_var(). However, if the CAR_GLOBAL
pointing to another object inside CAR is a relative offset
instead, we have a more generic solution that can be used
with timestamps code as well.

Change-Id: Ica877b47e68d56189e9d998b5630019d4328a419
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35140
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-09-09 22:17:27 +00:00
..
include arch/x86: Refactor CAR_GLOBAL quirk for FSP1.0 2019-09-09 22:17:27 +00:00
arch_timer.c device/mmio.h: Add include file for MMIO ops 2019-03-04 15:57:39 +00:00
boot.c riscv: add support for OpenSBI 2019-08-03 17:17:24 +00:00
bootblock.S riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
fit_payload.c arch/riscv: Enable FIT support 2019-08-08 13:03:59 +00:00
fp_asm.S riscv: update misaligned memory access exception handling 2018-09-10 15:03:58 +00:00
Kconfig riscv: add support for OpenSBI 2019-08-03 17:17:24 +00:00
Makefile.inc arch/riscv: Enable FIT support 2019-08-08 13:03:59 +00:00
mcall.c arch/riscv/mcall: Drop debug code 2019-06-28 07:35:56 +00:00
misaligned.c src/arch/riscv/misaligned.c: Fix an off-by-one error when loading the opcode 2018-10-30 02:07:58 +00:00
misc.c arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00
opensbi.c riscv: add support for OpenSBI 2019-08-03 17:17:24 +00:00
payload.c riscv: add support for OpenSBI 2019-08-03 17:17:24 +00:00
pmp.c riscv: add physical memory protection (PMP) support 2018-10-11 10:56:54 +00:00
ramstage.S riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
sbi.c src: Use include <console/console.h> when appropriate 2019-04-23 10:01:21 +00:00
smp.c riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
stages.c riscv: Remove unused headers 2019-07-28 16:34:11 +00:00
tables.c riscv: add support for OpenSBI 2019-08-03 17:17:24 +00:00
trap_handler.c src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
trap_util.S arch/riscv: Align trap_entry to 4 bytes, as required by spec 2018-02-20 20:44:43 +00:00
virtual_memory.c arch/riscv: Don't set FPU state to "dirty" 2018-12-19 05:46:07 +00:00