Nico Huber 9593e973fa soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE) ... Boards could choose a high ROM_SIZE that would result in an MTRR config that conflicts with other resources. Thus, always use the filtered CACHE_ROM_SIZE. Change-Id: I66d36b84ce49c1cb98cb36a4731977baaedf3225 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26575 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2018-05-31 15:11:21 +00:00
..
acpi	soc/intel/skylake: check DPTF_TSR1_ACTIVE_AC* in _ACx methods	2018-05-15 15:50:20 +00:00
bootblock	bootblock: Allow more timestamps in bootblock_main_with_timestamp()	2018-05-22 02:39:11 +00:00
include	soc/intel/skylake: Select common P2SB code	2018-05-31 04:27:28 +00:00
nhlt	intel/skylake: nhlt: Update Max98373's capture format	2018-05-28 16:08:56 +00:00
romstage	soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE)	2018-05-31 15:11:21 +00:00
acpi.c	soc/intel: Add support for USB ACPI code generation	2018-05-18 12:23:04 +00:00
chip.c	{mb,nb,soc}: Remove references to pci_bus_default_ops()	2018-05-08 03:01:04 +00:00
chip.h	soc/intel/skylake: Enable VT-d and X2APIC	2018-04-05 15:52:45 +00:00
chip_fsp20.c	{mb,nb,soc}: Remove references to pci_bus_default_ops()	2018-05-08 03:01:04 +00:00
cpu.c	soc/intel/skylake: Fix AP timeout issue while executing sgx_configure	2018-05-17 07:33:57 +00:00
elog.c	soc/intel/skylake: Probe XHCI for wake source for Internal PME	2017-10-19 00:43:45 +00:00
finalize.c	soc/intel/skylake: Select common P2SB code	2018-05-31 04:27:28 +00:00
gpio.c	soc/intel/common/block/gpio: Change group offset calculation	2018-02-16 03:59:29 +00:00
graphics.c	soc/intel/skylake: Hook up libgfxinit	2018-04-16 08:37:09 +00:00
gspi.c	soc/intel/{cannonlake,skylake}: Add _soc_ prefix in spi soc routine	2017-11-11 18:19:31 +00:00
i2c.c	drivers/i2c/designware: reduce API complication for bus config	2018-01-25 22:36:30 +00:00
irq.c	src/soc: Fix various typos	2018-02-20 23:17:39 +00:00
Kconfig	soc/intel/skylake: Select common P2SB code	2018-05-31 04:27:28 +00:00
lockdown.c	src: Remove non-ascii characters	2018-05-22 02:54:24 +00:00
lpc.c	soc/intel/skylake: Move PCR DMI programming into bootblock	2018-03-09 21:40:32 +00:00
Makefile.inc	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
me.c	soc/intel/skylake: Protect me_progress_rom_values array boundary	2018-03-30 06:43:12 +00:00
memmap.c	soc/intel: Remove superfluous pointers variables	2018-04-11 02:19:43 +00:00
pei_data.c	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
pmc.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00
pmutil.c	security/vboot: Move vboot2 to security kconfig section	2017-10-22 02:14:46 +00:00
reset.c	soc/intel/skylake: Add support in SKL for PMC common code	2017-10-05 21:11:39 +00:00
sd.c	soc/intel/skylake: Use SCS common code	2017-06-16 17:37:13 +02:00
smihandler.c	soc/intel/{apollolake, cannonlake, common, skylake}: Add _soc_ prefix in weak function	2017-12-23 05:23:09 +00:00
smmrelocate.c	soc/intel/skylake: Make use of common SMM code for SKL	2017-12-22 01:44:18 +00:00
spi.c	soc/intel/skylake: Make use of Intel SPI common block	2017-11-11 18:19:39 +00:00
systemagent.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00
thermal.c	soc/intel/skylake: Set low maximum temperature threshold for Thermal Device	2017-11-30 16:27:12 +00:00
uart.c	soc/intel/skylake: Support PCH UART 0 and 1 for console	2018-05-08 14:40:23 +00:00
vr_config.c	pci: Move inline PCI functions to pci_ops.h	2018-04-20 13:03:54 +00:00